搜索资源列表
LPT.rar
- 实现开漏输出的并口,支持3.3V或5V,支持FPGA 的PS 配置功能。8位配置数据 自动移位输出,输入时钟24MHz,产生1MHz配置时钟。8位CPU数据总线接口, 11位地址总线。支持IO 的置位清除功能。,The realization of open-drain output of the parallel port, support 3.3V or 5V, support for FPGA configuration of the PS function. 8-bit config
dianti.rar
- 以FPGA技术为基础,以VHDL为语言,以QuartusII为工具,设计一个5层楼的电梯控制器,To FPGA technology, to VHDL language to QuartusII as a tool to design a 5-story elevator controller
sd_reader.rar
- SD卡读卡器模块的VHDL及软件驱动代码,可作为外设挂接在Avalon总线上。支持以SD模式、4线模式读取。在24MHz时钟驱动下读取速率可达8MByte/s,SD card reader module and software drivers VHDL code, can be articulated as a peripheral bus in Avalon. To support the SD model, 4-wire mode read. Driven by the 24MHz clo
NiosII_implementation_in_CCD_C
- The concept of the Altera Nios II embedded processor implementation inside Field Programmable Gate Array [FPGA] of the CCD camera for the “Pi of the Sky” experiment is presented. The digital board of the CCD camera, its most important components, cur
pipeline.rar
- 关于FPGA设计中的流水线技巧的使用和例子,一个很好的减少硬件消耗的技巧,About FPGA design using pipelining techniques and examples, a good technique to reduce the hardware consumption
usart.rar
- USART coded in VHDL. It is writted in 5 files. I am uploading the files in order. ,USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
uart8.zip
- 使用Libero提供的异步通信IP核实现UART通信,并附带仿真程序。UART设置为1位开始位,8位数据位,1位停止位,无校验。且UART发送自带2级FIFO缓冲,占用FPGA面积很小。,Libero provided the use of asynchronous communication IP core implementation UART communications, and incidental simulation program. UART is set to 1 to sta
spicore.rar
- 基于FPGA的SPI控制器.doc,包括FPGA实现地源代码和协议的基本介绍,-FPGA-based SPI controller. Doc, including the FPGA to achieve an agreement to source code and a basic introduction
06-50.zip
- PAL decoder, spartan 3 FPGA,PAL decoder, spartan 3 FPGA
I2C.rar
- FPGA实现模拟I2C协议的过程,包括三个模块,i2c_master_bit_ctrl.v完成位传输功能、i2c_master_byte_ctrl.v完成字节传输功能,i2c_master_top.v完成整个程序的控制功能,并提供给外部程序的接口。 ,I2C Analog FPGA implementation of the Protocol process, including the three modules, i2c_master_bit_ctrl.v achieve bit tran
float_data_multiple_use_fixed_
- 采用fpga做小数运算的程序,使用了三级流水线技术,这是学习流水线和定点小数乘法很好的例子!,a program of float multiply, using 3-stage pipeline technology
ARM7TDMI.rar
- ARM7核在FPGA中的VHDL代码实现,ARM7 core in the FPGA in VHDL code
DDR_SDRAM.rar
- DDR RAM控制器的VHDL源码, 实现平台是Lattice FPGA,DDR RAM controller VHDL source code, the realization of Lattice FPGA platform is
DDS.rar
- 自己在Quartus下用VHDL编写的一个DDS程序。包括寄存器,累加器,波形存储器,In Quartus using VHDL procedures for the preparation of a DDS. Including the register, accumulator, waveform memory
8051_test2.rar
- 利用FPGA实现51IP核的下载和运行,并在下载到FPGA后,在改51IP核上运行自己编写的单片机程序,软核51单片机有利的解决了,硬件51单片机的很多限制,提高了单片机的性能。,FPGA realization of the use of nuclear 51IP download and run, and downloaded to the FPGA after the nuclear 51IP to run their own procedures for the preparation
DE2_LCM_TV_PAL.zip
- DE2上的基于FPGA视频开发资料第3部分!!!,DE2 video
DE2_LCM_TV_Simple.zip
- DE2上的基于FPGA视频开发资料第4部分!!!,DE2 video
HPI.rar
- 基于CPLD/FPGA器件的HPI接口程序 难能可贵,HPI based on CPLD/FPGA instrument
stx_cookbook.zip
- Altera公司高端FPGA高级综合指导手册,包括:算术运算单元,浮点处理技巧,数据编码格式转换,视频处理,仲裁逻辑,多路选择,存储逻辑,计数器,通信逻辑,循环冗余校验,随机和伪随机函数,加密和同步等编码风格和技巧;,advanced synthesis cookbook for Altera high-end FPGA(Stratix),incuding coding style and design tricks for arithmetic,floating points oper
xapp460.zip
- 利用FPGA实现TMDS接口标准,可用于DVI以及HDMI接口的FPGA实现(含文档),Video Connectivity Using TMDS I/O in Spartan-3A FPGAs