搜索资源列表
video_from_opencore
- 全电视信号编码器，verilog的，看看有借鉴价值否？-video signal encoder, Verilog, to see whether the reference value?
pci_verilog
- 一个pci接口的硬件描述语言的实现源代码,用verilog语言实现-a pci interface hardware descr iption language source code to achieve with verilog language
8259
- 8259中断控制器，参考网上的源码，但自己已经调通，并且应用在控制卡和通信卡上。-8259 interrupt controller, online reference source, but he had transferred Qualcomm, and applications in the control card and communication card.
Verilog_PS2_RS232
- 实现PS/2接口与RS-232接口的数据传输， PS/2键盘上按下按键，可以通过RS-232自动传送到主机的串口调试终端上，并在数据接收区显示接收到的字符。 串口调试终端的设置：波特率115200，一个停止位，无校验位。 -The realization of PS/2 interface with RS-232 data interface, PS/2 keyboard to press the button, through RS-232 automatic transmissi
PCR
- 本程序是在传输流传输过程中对节目时钟字段进行检测与修改,采用Verilog HDL 语言进行编程。-This procedure is in the transport stream during transmission of program the clock to carry out field testing and modification, using Verilog HDL language programming.
CY7C68013A_GPIF
- 对Mars-XC3S400-U板子上的CY7C68013A的GPIF测试代码-On Mars-XC3S400-U board on the test code CY7C68013A the GPIF
fpgashixiantongxin
- 提出了一种利用FPGA技术解决ARINC429通信的实现方案,该方案不仅使国内的ARINC429通信设备摆脱了对国外ASIC电路的依赖,还降低了设备成本,并且克服了国外ASIC电路的不足,实现了任意长度数据帧的群收和群发功能,具有较好的应用前景。利用该方案研制的ARINC429数据通信卡,已成功应用于空空导弹测控设备中。 -A use of FPGA technology to solve ARINC429 Communication program, which not only make
dallas_one-wire
- dallas one wire的VHDL实现方式,比较常用的.-dallas one wire to achieve the VHDL approach commonly used.
csa_float_multiplier
- 新型的浮点乘法器 用csa来实现可以用在浮点乘法器的地方-A new type of floating-point multiplier with CSA to achieve floating-point multiplier can be used in place
S8_VGA
- VGA的verilog hdl 程序，完成显示长条状显示不同颜色-VGA s verilog hdl procedures, completion of a long strip show show different color
EEPROM
- VHDL语言写的IIC实现EEPROM，很好的程序，已经用过，没有问题-Written in VHDL language IIC achieve EEPROM, good procedures are used, there is no problem
sha_core
- 安全散列函数的VERILOG实现，通过了fpga验证，在系统正可以直接当IP盒应用-Secure Hash Function VERILOG achieve, through the FPGA verification, the system is can be directly applied when the IP box
FIFO
- 用VERILOG写的FIFO程序，可以直接引用经本人测试-VERILOG written using FIFO procedures, can be directly invoked by the I test
divider
- 基于Verilog的除法器设计，可以直接在Q2里面运行哦~-Verilog-based design of the divider, which can be run directly in Q2 Oh ~
PLL
- verilog PLL的代码，和PLL 的功能介绍，希望能通过，只是简单了点-verilog PLL code, and the function of PLL, the hope, but simply a point
RS485
- 用VERILOG语言写的RS485通信程序,经调试可以直接使用-Verilog language used to write the RS485 communication program, the debugger can be used directly
OVL
- OVL——基于断言的verilog验证 Verilog数字系统设计:RTL综合、测试平台与验证-OVL- assertion-based verification of Verilog Verilog digital system design: RTL synthesis, test and verification platform
altera_maxII_PCI_Verilog
- Altera的MAXIICPLD模拟PCI接口的Verilog代码-Altera
verilog_hdl
- 精通verilog_hdl语言编程实例程序代码，基于verilog硬件语言的程序设计实例，主要是数字电路方面-Verilog_hdl proficient in language programming examples of program code, based on the Verilog hardware design language of the procedure, the main aspects of digital circuit
pwm16bits
- SPI总线Master的verilog代码-SPI Bus Master of Verilog code