搜索资源列表
Verilog_Designing
- Verilog设计教程（夏宇闻）。 北京航空航天大学经典教程。-Verilog Designing (Xia Yuwen). A classical book of Beijing University of Aeronautics and Astronautics.
FPGA
- 《无线通信FPGA设计》一书中例子的Matlab及verilog代码-" Wireless FPGA Design" a book example of Matlab and the verilog code
frequencycounter
- 一个简单大家容易看的懂的频率计设计程序，可以实现自动换挡功能。-A simple and easy to see to understand all of the frequency counter design program that can automatically shift feature.
82_Examples_for_VHDL_and_Verilog_code
- 包括VHDL、verilog在内的各种设计实例，是学习硬件描述语言的帮手。共有82个实验例子，涉及各种语法规则。-82 VHDL, verilog test case, involving a variety of grammatical rules. which is you learn the HDL language helper.
I2Cdesign
- Verilog数字系统设计教程【夏宇闻】原书第十章：IIC总线接口模块设计代码包-verilog program for iic bus design. the pakege includes iic protocl master program and behavel slavle program, even includes testbench and data bat files.
Verilog
- 通过本文章的学习能够使我们设计一些简单的逻辑电路和系统。很快我们就能过渡到设计相当复杂的数字逻辑系统。-To learn through this article, will enable us to design some simple logic circuits and systems. Soon we will be able to transition to the design of complex digital logic systems.
I2C-CPLD
- I2C总线通讯的CPLD实现，包括详细的设计方法及源程序。-I2C总线通讯的CPLD实现
SDRAMController
- xilinx公司SDRAM的参考设计,调试成功-xilinx' s SDRAM reference design, debug successful
doc17414x90
- ddr设计控制器，源代码！Verilog代码！-设计控制器，源代码！Verilog代码！
FPGA_verilog
- 资料包含无线通信FPGA设计代码，使用VERILOG语言编写-Information includes wireless communications, FPGA design code, the use of VERILOG language
angle
- verilog设计的求复角的源代码 通过仿真验证的-verilog design for phase
fir
- 数字电路设计中的，fir滤波器设计，我做的是8位宽的，利用vhdl实现，附带了完整的代码，报告，我没有对我的信息进行删除，是希望大家能够诚实的利用这个代码，提高自身本领。-Digital circuit design, fir filter design, I am doing is 8 bits wide, using vhdl implementation, with a complete code, the report, I did not delete my information i
VerilogCPU
- Verilog设计CPU这是某一本书的PDF版。-Verilog design of CPU which is a book of the PDF version.
clock
- 秒表的verilog语言实现，个人课程设计代码，已验证！实现显示秒，分，时暂停，修正等功能。-Stopwatch' s verilog language implementation, personal curriculum design, code, and has been verified! Implementation show seconds, minutes, suspended, amendment and other functions.
61EDA_H173
- Verilog设计的求复角的源代码(通过仿真验证的)-Verilog design of seeking re-angle the source code (through the simulation of the)
FSK_MOD_my
- verilog语言设计的用于fsk调制的源码-verilog language design for fsk modulation source
IIC_slave_core
- iic 总线规范和多个iic Verilog的设计论文,均为pdf-pdf of verilog iic
DPLL_verilog_a
- 用verilog语言描写设计的全数字锁相环，pDF资料-With the verilog language to describe the design of all-digital phase-locked loop, pDF information
microprocessor
- 一个微处理器的Verilog代码，根据英文书籍《数字设计与架构》中的例子而写，能够运行MIPS指令，能正确执行跳转指令。通过modelsim仿真，含测试代码。-Verilog code for a microprocessor, according to the English book " Digital Design and Architecture" was written in the example, to run MIPS instructions to jump
TLC5510
- 采用超高速AD存储示波器程序设计。器件是采用TLC5510。用FPGA来控制实现。-The ultra high speed AD storage oscilloscope programming. Device is used TLC5510. Using FPGA to control the implementation.