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verilog
- 语言设计，虚拟器件，有限状态机，verilong语言教程等-Virtual Appliance
shumaguan-Verilog
- 简单的数码管电路设计实现代码 verilog-Simple digital circuit design implementation code verilog
verilog
- verilog课件，讲述语言的详细资料和应用，对FPgA的设计有很好的作用-verilog courseware, details about the languages and applications designed for FPgA have a good effect
DDS-Verilog
- DDS设计的源代码 用于生成高精度的DDS程序 VERILOG-VERILOG DDS DDS program design source code used to generate high-precision
uart_fifo
- 带fifo的串口通信verilog设计，该设计为学习uart所用，完成PC端发送至fpga后fpga原数据返回，支持长字符串。-Serial communication with fifo verilog design, which is used to learn uart complete PC sends data back to the original post fpga fpga, support long strings.
dianzhen
- 如果需要用verilog设计一项比较简单的功能，那么这个浅显易懂的程序能让你很快明白点阵的设计方法，尤其是对那些初学者-If you need to use a relatively simple verilog design features, then this easy to understand design of the program allows you to quickly understand the lattice method, especially for those w
verilog
- 《verilog_数字系统设计课程》(第二版)思考题答案-" Verilog_ Digital System Design Course" (Second Edition) Questions answers. Rar
CAN-BUS-with-Verilog
- CAN 总线的verilog是实现与设计 很好的资料-implementation of can bus use verilog
verilog-hdl
- VHDL的各种算法算例，可供西电的大作业设计参考，是学习可编程语言的必备算例-VHDL examples of various algorithms available for Western Electric' s big job reference design is essential to learn a programming language examples
bahe
- 采用verilog设计的拔河比赛，在QuartusII9。0仿真验证并在DE2上测试过-Using Verilog to design the tug of war, in QuartusII9. 0 simulation and test on DE2
number_mod
- 以verilog设计最大为99数字在2个数码管资源上的显示，采取的方法是同步动态扫描。-Verilog design to a maximum of 99 digits displayed on two digital resources, the approach is synchronous dynamic scanning.
vga
- 用verilog设计控制程序从 ROM模块读取图片信息，然后写入 VGA接口。控制程序每隔250ms写入不同的信息至VGA接口，在屏幕上会出现小绿人的动画。-Reading the image information from the ROM module verilog design control procedures, and then write the VGA connector. Control program every 250ms write different messages
Verilog
- 基于Verilog语言的实用FPGA设计(美）科夫曼-Verilog FPGA
The-four-locks-Verilog-based-design
- 基于Verilog的四位密码锁设计，采用有限状态机进行编写-The four locks Verilog-based design, finite state machine for the preparation
Verilog-design-experience
- 可编程逻辑基本设计原则,包括组合逻辑电路,时序逻辑电路-Programmable logic basic design principles, including the combinational logic circuits, sequential logic circuit
ssram_latest.tar
- SSRAM接口,就是同步静态随机存取存储器接口整个工程文件，包括从前端verilog设计到后端仿真的整个工程-SSRAM interface is synchronous static random access memory interface entire project, including the design from the front to the back verilog simulation of the entire project
Verilog
- Verilog课程设计自动售货机 1）设计一个自动售货机，此机能出售1.5元、2元两种商品。出售哪种商品可有顾客按动相应的一个按键即可，并同时用数码管显示出此商品的价格。可同时购买两种、多件商品。 2）顾客投入硬币的钱数有5角、1元两种。此操作通过按动相应的两个按键来模拟，并同时用数码管将投币额显示出来。 3）顾客投币后，按一次确认键，如果投币额不足时则报警灯亮。如果投币额足够时自动送出货物（送出的货物用相应不同的指示灯显示来模拟），同时多余的钱应找回，找回的钱数用数码管
shift-register-
- 含同步预置功能的右移移位寄存器设计Verilog设计-Verilog right shift
uart-verilog
- Uart的设计，Verilog语言，包含设计文档。-Uart design, Verilog language, including design documentation.
Verilog
- 夏宇闻数字逻辑设计，非常好的VHDL学习资料，不多说了-Xia Wen digital logic design, VHDL very good learning materials, not much to say