当前位置：
首页 资源下载
搜索资源 - vhdl state machine
搜索资源列表
-
0下载：
此模块用 ＶＨＤＬ 硬件描述语言来实现，对键盘设计的实际操作检验表明，此模块响应迅速、识别准确，较好地实现了键盘扫描和去抖动功能， 达到了预期的设计目的。同时，将状态机、扫描线、计数器等相关参数稍作改动，就可以扩展到实现不同键盘矩阵的设计-VHDL hardware descr iption language to achieve the keyboard design of the actual operation of testing show that This module in res
-
-
0下载：
朋友，我是Jawen.看到先前上载的一套CPLD开发板的VHDL源码挺受欢迎的，现在就将她的Verilog源码也一并贡献给大家：8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,四位比较器,7段数码管,i2c总线,lcd液晶显示,拨码开关,串口,蜂鸣器,矩阵键盘,跑马灯,交通灯,数字时钟-friends, I Jawen. previously seen on the set of CPLD Development Board VHDL source code q
-
-
0下载：
cpld状态及设计。
很好的文章。
要设计vhdl状态机的话，最好看看。-cpld state and design. Good paper. Vhdl to design the state machine, the best look.
-
-
0下载：
this a pack include source code for quartus 2.
It is an implementation of the LC2. The LC-2 computer is described in Introduction to Computing Systems from Bits & Gates to C & Beyond by Yale Patt and Sanjay Patel, McGraw Hill, 2001. The LC2 mode
-
-
0下载：
这是“状态机设计（讲稿）”，希望对正在学VHDL的同学有帮助，谢谢！-This is the "state machine design (the scr ipt)", and I hope to learn VHDL is there to help the students, thank you!
-
-
0下载：
VHDL实例，各个方面均有，基本语法，状态机，汉明码，寄存器，步进电机控制器，表决器，多路选择器，译码器等等,VHDL model,include: basic grammer,moore mealy state machine,register,counter,multi,decoder,et..
-
-
0下载：
这是一个用VHDL语言写的用状态机控制cs5550进行AD转换的代码，里边包含用逻辑分析仪进行分析的文件。具有很强的可移植性。,This is a work written in VHDL language using state machine control cs5550 for AD conversion code inside that contains the logic analyzer with an analysis of documents. Are highly portab
-
-
0下载：
This code allows an application with the state machine in VHDL and his conception
-
-
0下载：
VHDL语言 状态机实现AD9833信号的产生-VHDL language state machine to achieve AD9833 signal generation
-
-
0下载：
用VHDL实现的有限状态机，还有modelsim仿真文件，及仿真结果-VHDL implementation using finite state machine, there modelsim simulation file, and the simulation results
-
-
0下载：
VHDL新手入门：有限状态机练习（三段式结构）-VHDL Getting Started: Finite state machine exercises (three-stage structure)
-
-
0下载：
利用FPGA,VHDL语言的状态机设计步进电机驱动。-FPGA, VHDL language state machine design stepper motor driver. . .
-
-
0下载：
sdram接口的vhdl实现,适用于lattice的FPGA，内含状态机和各个模块的具体实现-SDRAM interface VHDL realization lattice applied to the FPGA, containing the state machine and the concrete realization of each module
-
-
0下载：
moore状态机~~~
用vhdl语言实现-moore state machine ~ ~ ~ using VHDL language
-
-
0下载：
通用的基于状态机的VHDL按键及信号去抖动模块，非常有用-Generic VHDL-based state machine keys and signal to the jitter module, very useful
-
-
0下载：
里面有四个vhdl源程序 分别为状态机 三位表决器 和交通灯 优先编码器-There are four VHDL source code for the state machine, respectively, the three voting machines and traffic lights priority encoder
-
-
0下载：
一部分简单时序逻辑电路的VHDL源代码，未包含状态机描述-Part of a simple sequential logic circuits VHDL source code, does not contain a descr iption of state machine
-
-
0下载：
几个稍微深入的时序逻辑电路和状态机的VHDL代码-Several little-depth sequential logic circuit and state machine of the VHDL code
-
-
0下载：
简单数字系统的VHDL代码，综合了组合，时序，和状态机-Simple digital system VHDL code, a combination of combinations, timing, and the state machine
-
-
0下载：
雷鸟车尾灯状态机,vhdl实现，对学习VHDL的同学有帮助。-Thunderbird taillights state machine, vhdl realize, the study has helped students VHDL.
-
