搜索资源列表
m15
- 扩频通信M序列,编码,通用VHDL语言-M sequence spread spectrum communication, coding, generic VHDL
m511new
- 扩频通信M511序列,编码,通用VHDL语言,用于相关-M511 sequence spread spectrum communication, coding, generic VHDL, for related
MatchFilter
- Quartus Ⅱ开发环境，VHDL语言实现扩频通信的匹配滤波功能。用于匹配滤波器的FPGA实现！
DDs
- 这是我的毕业设计，是用VHDL编程的直接扩频发生器。
DS_Receiver_Design
- 扩频接收机设计实例(VHDL\\MATLAB)
kpjsj
- 次源码实现一个扩频接收机系统，用VHDL语言编写，并且有完整得测试程序
code_dco.rar
- 通信电路中产生扩频码的电路，应用于GPS中的跟踪和捕获．,Communication circuit of the circuit generated spreading codes used in GPS tracking and capture.
m.rar
- 扩频接收机设计的部分，一个用vhdl语言编写的m序列生成器，,A language with vhdl generator sequence m
baseband_verilog.rar
- verilog实现的基带信号编码，整个系统分为六个模块，分别为：时钟模块,待发射模块,卷积模块,扩频模块,极性变换和内插模块,成型滤波器,verilog implementation baseband signal coding, the entire system is divided into six modules, namely: the clock module, to be launched modules, convolution module, spread spectrum m
DSSS
- 基于FPGA的我直接扩频序列发射机的quarters代码，-direct sequence transmitter
up_buhuo
- 这是一个VERILOG接收端捕获模块，扩频码32倍，可以检测到相关峰-This is a VERILOG receiver capture module ,the spreader is 32,it can test the correlation peak
DSSS-Transmitter
- 北斗定位系统卫星下行信号的基带处理部分——基于FPGA的直接序列扩频发射机的设计与仿真。-Beidou Positioning System satellite downlink of the baseband signal in part- based on direct sequence spread spectrum FPGA Design and Simulation of the transmitter.
kuoping
- fpga嵌入式设计 扩频接收机设计 有matlab 和vhdl 对比情况-Design of spread-spectrum receiver embedded FPGA design and VHDL contrast matlab
VHDL_DMF
- Vhdl实现扩频通信匹配滤波器，书上打下来的,打了好久.-VHDL realization of spread spectrum communication matched filter, books, playing down, playing for a long time.
ruan
- 扩频发射机，信道编码采用(2, 1, 7)卷积 码, 扩频模块采用扩频长度255 的kasami码, 极性变换模块为3bit 量化模式, 内插模块为每两比特间插入7bit 和输出滤波为16 阶的FIR 滤波器。-direct sequence spread spectrum transmitter
MatchFilter
- VHDL语言实现8路并行输入，8路并行输出，直接序列扩频接收机的高速匹配滤波。 -VHDL language to achieve 8-channel parallel input, 8-channel parallel output, high-speed direct-sequence spread spectrum matched filter receiver.
kuopin_vhdl
- 直接序列扩频的VHDL实现，论文里面提供了较好的源码和方案设计-Direct Sequence Spread Spectrum of the VHDL implementation, research papers which provide a better source and program design
Spread-Spectrum-Receiver-code
- 基于FPGA的扩频接收机（直扩）vhdl编写的，最好在quartus环境运行。-FPGA-based spread spectrum receiver (DS) vhdl prepared, the best environment to run in quartus.
Rake-receive
- 本文介绍的一种基于多载波扩频通信的Rake接收机工作原理以及设计思想，并用FPGA技术加以实现-This article describes a multi-carrier spread spectrum based communication works as well as Rake receiver design and implementation with FPGA technology to
Costas
- 介绍了某直接序列扩频、QPSK调制系统接收通道中四相Costas 载波跟踪环的原理及其基于 DSP+FPGA 的实现-Introduced a direct-sequence spread spectrum, QPSK modulation system, receive path Costas carrier tracking loop four-phase principle and its implementation based on DSP+ FPGA