搜索资源列表
CIC_deci4.rar
- cic抽取滤波器ip核，用于射频采样数字下变频模块的核心数字信号处理部分.此ip核已经过ise10.2验证,CIC decimation by 4 filter，used in Direct RF sampling of GPS signal. the core dsp block in a frondend design
digitaldown-conversion.rar
- FPGA实现数字下变频，仅供大家参考，希望有用。,Use FPGAto achieve digital down-convertion.For your reference, I hope it can be useful for you
ddc.rar
- 数字下变频器的matlab实现，一定的设计指标，可以用来知道vhdl程序设计,Digital Down Converter for matlab realized, certain design specifications that can be used to know VHDL Programming
DDC.rar
- verilog语言实现的数字下变频设计。 在ALTERA的QUARTUS ii下实现。实用，好用。,Verilog language implementation of the digital down-conversion design. ALTERA at the implementation of QUARTUS ii. Practical, easy to use.
DDC_prj1
- 公司最近项目做的一个DDC（数字下变频）simulink建模模型 真情奉献给大家-this is a project about digital down-converter,it is bulit with Simulink.
ddc
- DDC仿真模型，利用systemgenerator实现数字下变频-DDC simulation model, the use of digital down-conversion systemgenerator
20100407
- 用MATLAB仿真的数字下变频程序，变频，滤波未用matlab函数，而是用代码完成，便于移到DSP或FPGA上。供参考。-Using MATLAB simulation of digital down conversion process, conversion, filtering is not used matlab functions, but with code completion, easier to move on a DSP or FPGA. For reference.
ddc_30m
- 中频70M，30M带宽LFM信号，采样率为102.4M，数字下变频后，还进行了三倍抽取，最后还得到I，Q两路信号 -IF 70M, 30M bandwidth LFM signal, the sampling rate of 102.4M, digital down conversion, the samples were carried out three times, the last also I, Q two-way signal
ddc_FPGA
- 简要介绍了数字下变频的设计，通过采用xilinx的ise软件，ipcore的调用实现-Briefly introduced the design of digital down conversion, through the use of ise the xilinx software, ipcore call the realization of
project_UHF_ddc
- vhdl语言写的数字下变频的实现，整个工程文件，xlinx ise用的-VHDL language written in the realization of digital down conversion, the whole project file, xlinx ise used
lpl
- 用于数字下变频器的 FPGA 实现 -Digital Down Converter for the FPGA to achieve
DDC_CIC
- 用CIC 和 FIR Filters设计的数字下变频器，DSP Builder6.1版工程文件-Using CIC and FIR Filters Design of Digital Down Converter, DSP Builder6.1 version of project file
DVB_T-ofdm-reception
- 自己编写的DVB-T 2K模式下接收机,包括解调模块,模拟下变频模块,数字下变频模块等 ,可直接运行.-I have written DVB-T 2K mode receiver, including the demodulator module, analog down-conversion modules, such as digital down conversion module can be directly run.
systemtestask
- 数字下变频的matlab仿真源程序，自动生产图形-Digital Down Converter，matlab source
wddc_module
- 数字下变频的Verilog程序，测试可以直接使用，将A/D信号下变频为基带I，Q两路信号-Digital down conversion of the Verilog program, testing can be used directly to A/D signal down-conversion to baseband I, Q signals two
tes_amp_80_0314
- 基于dsp builder的数字下变频器，IP核做的-digital down converter,degigned in matlab
RealizationofdigitaldownconversionbyFPGA
- 介绍在FPGA 器件上如何实现单通道数字下变频（DDC）系统。利用编写VHDL 程序和调用部分IP 核相结合的方法研究了数字下变频的FPGA 实现方法,并且完成了其主要模块的仿真和调试,并进行初步系统级验证。-Introduced in the FPGA device on how to achieve the single-channel digital down conversion (DDC) system. VHDL procedures and the use of the prepa
verilog_FPGA_DDC
- 这是一个用verilog HDL实现的实现数字下变频的源代码。-This is a verilog HDL used to achieve the realization of digital down conversion of the source code.
GSM_DDC
- GSM中数字下变频器的matlab辅助设计，并可以采用matlab生成verilog代码。-GSM digital down converter in the matlab-aided design, and can be used matlab generate verilog code.
nco
- 基于DSP builder搭建的DDS模块，可以用在数字下变频中的NCO等-Based on DSP builder to build the DDS module can be used in digital down-conversion of the NCO, etc.