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leon3-altera-ep2s60-ddr
- The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around a common on-chip bus, and use a coherent method for simulation and synthesis. The library is vendor in
fpga_tcl
- Altera FPGA的特殊管脚的连接(中文).doc TCL_教程.pdf-Altera FPGA tcl
WallaceTreeImplementationInVHDL
- Wallace Tree Implementation in VHDL WT is one of the fastest way to implement multiplication of numbers in hardware design. (Optimized version) Tested in Altera 3.5u board by MonteCristo (H.U.T)
FPGA_TFT
- 使用FPGA驱动TFT液晶实现显示，开发环境为ALTERA公司的软件-Driven by the FPGA TFT LCD display, the software development environment for ALTERA
part1
- a 4-bit synchronous counter using T-Flip Flops and AND gates in verilog code. Implements on educational kit Altera MAX7000s EPM7128SLC84-7.
Ekran
- It is an Arkanoid game that is written by me in VHDL language. ı t is possible to play it via an altera FPGA and a monitor.
craps
- this the source code we have been working on for our project using altera de2 board. the code can be run but some of it miss the end game module, while some doesn t have the complete vga code-this is the source code we have been working on for our pr
altera-ci
- CI driver in conjunction with NetUp Dual DVB-T C RF CI card.