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4下载:
基于FPGA的can 总线设计,采用verilog语言编写。在FPGA的开发环境下,新建一个工程,然后将本文件中的各个源代码添加进工程里,即可运行仿真。-FPGA-based bus design can use verilog language. FPGA development environment, a new project, and then the paper all the source code to add the project, Simulation can be run
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一个canbus通讯软件源代码,用VC编译,不用做修改就可以用,绝对实用代码。,A CANBUS communications software source code, compiled with VC, do not make modifications can be absolutely useful code.
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用verilog编写实现的CAN总线控制器源码,自带testbench,解压后用ISE打开工程文件即可。-Prepared with the verilog source code to achieve the CAN bus controller, bring their own testbench, after decompression project file can be opened with the ISE.
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STM CANBus通讯部分源码,经过测试,完全好用的。-STM32 CANBus communication part of the source code, tested, fully nice.
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can总线程序,包括原理图,说明资料,源程序等。-can bus procedures, including schematics, descr iptive information, source code and so on.
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CAN总线的FPGA实现源代码,Verilog语言实现-CAN Bus FPGA source code
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freescale canbus 解決方案 , 非常難得的資料
MC9S08dz60-freescale canbus is very good source code , MC9S08dz60
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CAN microcontroller source code related to CANbus stack development.
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CANbus source code related to CANbus stack development
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CANbus source code related to CANbus J1939
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CANbus microchip savelib source code (stack development)
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CANopen source code microchip
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