搜索资源列表
sl361_schematic-gerber
- fpga-sdram开发板-sch,本原理图是xilinx公司s3系列开发板的sdram-- SDRAM development board - sch, the diagram is Xilinx companies s3 series of development board SDRAM
FPGA_Load
- 用8031加载ALtera的FPGA,也可用于Xilinx的FPGA的加载-loaded with 8,031 ALtera FPGA, Xilinx also can be used to load the FPGA
xapp290
- 从Xilinx网站上下的,学习FPGA部分动态重配置很好的例子。-from across the Xilinx website, learning some FPGA dynamic reconfigurable good example.
taxiwork
- 介绍了基于FPGA的多功能计程车计价器的电路设计。该设计采用了可编程逻辑器件FPGA的ASIC设计,并基于超高速硬件描述语言VHDL在Xilinx公司的SpartanⅡ系列的2sc200PQ208-5芯片上编程实现了整个系统的控制部分,整个自动控制系统由四个模块构成:秒分频模块、控制模块、计量模块和译码显示模块。该设计不仅仅实现了显示计程车计费的功能,其多功能表现在它可以通过选择键选择显示计程车累计走的总路程和乘客乘载的时间。计时、计程、计费准确可靠,应用于实际当中有较好的实用价值和较高的可行性
System09
- BurchED B5-X300 Spartan2e using XC2S300e device Top level file for 6809 compatible system on a chip Designed with Xilinx XC2S300e Spartan 2+ FPGA. Implemented With BurchED B5-X300 FPGA board, B5-SRAM module, B5-CF module and B5-FPGA-CPU-IO
S3Demo
- 用FPGA模拟VGA时序、模拟PS/2总线的键盘接口VHDL源代码,基于Xilinx spartan3-VGA FPGA timing simulation, simulation PS / 2 keyboard interface bus VHDL source code, Based on Xilinx spartan3
I2C_loader
- 用FPGA做主控制器,对IIC从设备配置参数的源程序。Xilinx提供-FPGA master controller, right from the IIC equipment configuration parameters of the source. Xilinx offer
Xilinx_Vivado_Design_Suite_HLx_Editions_2018.2
- vivado 2018.2 license
SRIO_DSP_X1
- xilinx 7 系列fpga与dsp srio数据传输(fpga and dsp communation with srio)
xapp1247-multiboot-spi
- fpga的multiboot ref desgin(fpga multiboot ref desgin)
to cameralink
- xilinx spartan6系列FPGA,cameralink实现模块(xilinx spartan6 serial FPGA,cameralink module)
02Kintex修炼秘籍-MIG DDR应用3缓存设计
- vivado下的MIG教程,适用于XILINX 7系列FPGA(MIG tutorial under vivado.)
黑金 AX545516开发板 Verilog 教程
- xilinx SPARTAN 开发板资料、及详细例程讲解(xilinx demo board designed example)
xapp1247-multiboot-spi
- Xilinx 7系列 FPGA multiboot功能说明文档,增加FPGA加载可靠性(Xilinx 7 Series FPGA multiboot function descr iption document to increase FPGA loading reliability)
lab6
- 使用vivado和Xilinx开发板实现VGA图像显示,开发板为Xilinx Artix-7(Using vivado and Xilinx development board to realize VGA image display, the development board is Xilinx artix-7)
lab7
- 使用vivado和Xilinx开发板实现蓝牙远程控制,开发板为Xilinx Artix-7(Using vivado and Xilinx development board to realize Bluetooth remote control, the development board is Xilinx artix-7)
08_1_hdmi_output_test
- HDMI输出彩条测试程序,在赛灵思平台有过验证,可以显示1920×1080分辨率30帧得图像(HDMI output color bar test program verified on Xilinx platform)
test_ddr3
- 基于XILINX K7系列FPGA实现5120*5120分辨率20帧的DDR3读写,发送到海思3559,HDMI显示。(Based on Xilinx K7 series FPGA to achieve 5120*5120 resolution of 20 frames of DDR3 read and write, sent to the Hays 3559,HDMI display.)
xilinx dds上板实现全代码
- 基于fpga得dds设计,完整教程请移步csdn https://blog.csdn.net/syyzuiqiang?spm=1000.2115.3001.5343
dynamic control xilinx fpga
- 文件中,有赛灵思动态配置PLL的相关代码,用户可以通过DCP 接口对pll的输出频率 动态设置