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AHBtoAPB.rar
- amba总线桥:ahb to asb!verilog hdl文档加代码，非常全，soc,amba bus bridge: ahb to asb! verilog hdl code for the document plus a very full, soc
ahb_interface.rar
- AHB BUS, Master Slave Arbiter -- example,AHB BUS, Master Slave Arbiter
ahb_ram
- AHB接口的ram控制器，可靠性非常强。除了两个周期内发生读到写或写到读的极限情况（一般处理器设计中不会有这种传输方式），其他传输方式完全没有问题-AHB interface ram controller, reliability is very strong. In addition to occurring in two cycles read or write read write the limit (usually processor design will not have such
AMBA-AHB-APB-BUS
- 常见ARM架构的AMBA、AHB、APB总线的介绍，对ARM的总线有个清晰的了解，对各模块的关系也可深入了解-Common ARM architecture AMBA, AHB, APB bus introduction of ARM' s have a clear understanding of the bus, on the relationship between the modules can also be in-depth understanding of
DW_8b10b_enc.v.tar
- amba ahb protocol with test benches
New
- amba ahb master decoder
AHB_Lite_PO
- AHB Lite specification of AMBA protocol
CAST_sdr_sdram_ctrl-xact
- Single Data Rate Mobile SDRAM Controller Core with AHB Interface
masterdecoder
- AHB总线协议 Master实现代码，对于开发AHB总线的很有帮助-AHB bus protocol to achieve Master code, very helpful for the development of AHB bus
slaveAHB
- 基于ahb协议写的简单salve，水平有限莫怪啊-Ahb-based protocol to write a simple salve, is limited No wonder, then ah
apb2ahb
- verilog code for apb to ahb convert
ahb_system_generator_latest.tar
- this project relates ahb
ahb2pvci
- ahb to pvci bridge, free code
AHB
- 用VHDL编写的AMBA总线的AHB代码-Written with the VHDL code for AMBA bus AHB
arm9verilog
- AMBA AHB verilog Source code
AHB_to_Wishbone_Verilog
- 该源代码包是AHB总线到Wishbone总线的交接器，包括以下4个部分：RTL源代码，测试平台，软件测试程序，说明文档。-This source package is the AHB bus to Wishbone bus bridge(wrapper).It has the following 4 parts: RTL codes, testbench, software simulating files, help documents.
ahb_slave_latest.tar
- this shows the ip code for amba ahb slave in vhdl.
AHB
- AMBA片内总线结构的设计，给需要的人啊。-AMBA on-chip bus architecture is designed to need ah.
AHB-BUS-AND-SLAVE-CODE-USING-VERILOG
- AHB总线下的slave代码verilog-AHB BUS AND SLAVE CODE USING VERILOG
AHB-task-slave-master
- ahb master行为级模型，ahb slave模型(AHB master behavior level model, AHB slave model)