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GrayCnt
- 格雷码计数器的verilog实现，做通讯的朋友可以-Gray code counter verilog implementation, so friends can see communication
counter_99
- Verilog实现的倒计数器，从99到1再循环，编译成功，可以直接运行，是很好的verilog语言的例子-Verilog implementation of the down counter, from 99-1 recycling, compiled successfully, you can directly run, is a good example of verilog language
wb_conmax_latest.tar
- WISHBONE总线的接口实现，采用Verilog完成。能同时连接8个主设备和16个从设备。-WISHBONE bus interface, the use of Verilog to complete. Can simultaneously connect up to 8 masters and 16 slaves.
2
- Verilog多功能数字时钟，是一个可在开发板上实现的时钟程序,不仅可以做为时钟用,还另外加了个跑秒的功能.-Verilog multifunction digital clock is a clock in the development process to achieve the board, not only can be used as the clock use, but also other added a second run features.
VHDL
- 介绍Verilog HDL, 内容包括：Verilog应用，Verilog语言的构成元素，结构级描述及仿真 ，行为级描述及仿真，延时的特点及说明 介绍Verilog testbench，激励和控制和描述 结果的产生及验证，任务task及函数function 用户定义的基本单元(primitive)，可综合的Verilog描述风格等-Introduction Verilog HDL, including: Verilog applications, Verilog language
verilog_trafficlight
- 用Verilog语言实现交通灯功能，可以参考一下-Traffic lights with the Verilog language features, you can refer to
TheVerilogHardwareDescriptionLanguage
- 国外的一本verilog方面的书籍，挺经典的。大家有兴趣的可以读一读，读原著的感觉很不一样，可以学到很多东西-Abroad, a verilog books, very classic. We are interested can read, Du Yuanzhu feel very different, you can learn a lot
1-5
- 实现PN码,使用Verilog HDL编程实现-it can produce PN
anjianshumaguan
- 按键与数码管显示 采用verilog语言编译 可在quarter ii编译 所有文件都包含了-Buttons and digital display with verilog language compiler can be compiled in the quarter ii files contain all
z_motor_driver
- VERILOG 直流无刷驱动模块，可进一步完善并优化。 已通过测试-VERILOG brushless DC drive module can be further improved and optimized. Has been tested
lab1_datasheets
- its for doing vga in verilog you can see it like this its working
pseudo-randomcodegenerator
- VERILOG语言编写的伪随机码产生器，可以ISE中编绎调试-VERILOG language of pseudo-random code generator, you can unravel ISE in debugging code
verilog_calculator
- 用verilog编写的简易计算器代码。通过一位全加器组成电路，可以实现加法、减法和乘法，并在七段数码管上显示出十进制的结果。-Simple calculator with code written in verilog. Composed by a full adder circuit, can add, subtract and multiply, and in the seven-segment LED display on the decimal result.
sdram
- 使用VERILOG访问SRAM的程序，有需要的可以拿来借鉴-SRAM using VERILOG access procedures can be used in need of reference
vga-dis
- 用Verilog语言设计的基于ＶＧＡ显示器的汉字和字符显示！已经编译成功，可以直接使用-VHDL language design with VGA display based on characters and character display! Has been successfully compiled, you can directly use! ! !
clock
- XPS做时钟的配置过程基于EXCD-1开发板,其实是基于xilinx的ISE来开发的，但是开发环境没有这个就这能选VHDL，另外是verilog的，呵呵。希望大家能够真正用上，挺好的“基于ISE的时钟”-XPS to do the configuration process is based on the clock EXCD-1 development board, in fact, is based on the xilinx the ISE to develop, but not the
jjm
- 用Verilog实现的crc16编码器，可以实现任意长度帧的发送信息的crc无失真编码-Implemented with Verilog crc16 encoder can send frames of any length lossless coding of information crc
cpu
- 简单的cpu，以verilog语言写的，希望大家能提点意见。-Simple cpu, the verilog language to write, and I hope we can Tidianyijian.
SynthesizableVerilogcode
- 可综合的Verilog代码 可综合的Verilog代码 -Synthesizable Verilog code can be integrated Verilog synthesizable Verilog code, the code can be integrated Verilog code
display1211
- 在sparten 3E FPGA上的液晶显示器的控制时序verilog程序，可以在液晶屏上显示任意字符-Sparten 3E FPGA in the liquid crystal display on the control of timing verilog program, you can display any character on the LCD screen