搜索资源列表
-
1下载:
用Verilog DHL语言编写的一个数字钟程序,除了基本计数,还具有校时,闹钟功能-Verilog language used in the preparation of a digital clock procedures, in addition to the basic count, but also with school, an alarm clock
-
-
0下载:
使用Verilog语言编写的数字钟程序.有慢校时,快校时,闹钟等功能.-use Verilog language prepared by the digital clock procedures. Schools are slow, quick school, alarm clock functions.
-
-
0下载:
verilog语言实现的数字钟,各种定时闹钟功能类似真实的表~利用EDA实验平台实现~~,Verilog language implementation of the digital clock, alarm clock features a variety of regular table similar to the real experimental platform ~ using EDA implementation ~ ~
-
-
0下载:
设计一个能进行时、分、秒计时的十二小时制或二十四小时制的数字钟,并具有定时与闹钟功能,能在设定的时间发出闹铃音,能非常方便地对小时、分钟和秒进行手动调节以校准时间,每逢整点,产生报时音报时。
实验平台:
1. 一台PC机;
2. MAX+PLUSII10.1。
Verilog HDL语言实现,还有完整的实验报告-The design of a can be hours, minutes, seconds time of 12 hours or 24 hours system, d
-
-
1下载:
采用Verilog HDL语言编写的多功能数字钟,包括四个功能:时间显示与设置、秒表、闹钟、日期显示与设置.-Using Verilog HDL language multi-functional digital clock, including the four functions: time display and settings, stopwatch, alarm clock, date display and settings.
-
-
0下载:
多功能数字钟Verilog HDL的源码,能够整点报时,报整点数,设定任意时刻闹钟,低音高音两种频率。-Multi-function digital clock Verilog HDL source code, set the alarm clock at any time, bass treble two frequencies. It s for FPGA.
-
-
0下载:
数字钟verilog程序,实现了校时、闹钟校正、整点报时功能。-Digital clock verilog program, school, alarm clock correction, the whole point timekeeping function.
-
-
0下载:
verilog实现数字钟功能,闹钟功能,日历功能-Verilog digital clock function, alarm clock function, calendar function
-
-
1下载:
用 Verilog HDL 设计一个多功能数字钟,包含以下主要功能:
1) 计时,时间以 24 小时制显示;
2) 校时;
3) 闹钟:设定闹钟时间,可利用 LED 闪烁作为闹钟提示;
4) 跑表:启动、停止;
5) 其他。-Using Verilog HDL design a multi-functional digital clock contains the following main functions: 1) time, the time is displayed
-
-
0下载:
利用vhdl和verilog两种方式可以实现的fpga芯片的数字钟,其中包含多个可设计改动的个性化模块。源代码利用quartusii平台写作,可移植性很强。-Using vhdl and verilog fpga can be achieved in two ways-chip digital clock, which includes several design changes personality module. Source code using the platform quartu
-
-
0下载:
数字钟的实现,有时分秒,有闹钟模式,通过手动校准时分秒-Digital clock implementations, sometimes every minute, alarm clock mode, manual calibration Minutes
-
-
0下载:
verilog的数字钟代码,在XILINX上运行,可以手动设置时钟、闹钟,可报警-digital clock verilog code running on XILINX, you can manually set the clock, Alarm Clock, alarm
-
-
0下载:
采用可综合的Verilog代码编写一个带闹钟功能的数字钟。使其具有以下功能:
1)计时功能:包括小时、分钟、秒钟。
2)校时功能:对小时、分钟和秒钟进行手动校时。
3)定时和闹钟功能:能在手工设定的时间产生闹铃音。
-Using synthesizable Verilog coding a digital clock with alarm. It has the following features:
1) timing functions include: hours, m
-
-
0下载:
原创数字钟verilog程序,能实现数字钟基本功能,如:计数,跑表,定时,闹钟。用于ISE软件。-Original digital clock verilog procedures, to achieve the basic functions of digital clock, such as: counting, stopwatch, timer, alarm clock.
-
-
0下载:
采用Verilog HDL语言编写的多功能数字钟,包括四个功能:时间显示与设置、秒表、闹钟、日期显示与设置-.-Using Verilog HDL language multi-functional digital clock, including the four functions: time display and settings, stopwatch, alarm clock, date display and settings
-
-
0下载:
基于verilog简易数字钟,能够做到计时,闹钟,倒计时等功能。(Based on Verilog simple digital clock, can achieve time, alarm clock, countdown and other functions.)
-
-
0下载:
利用Verilog层次化设计的多功能数字时钟,可以调时,设置闹钟,仿广播台整点报时(The use of Verilog hierarchical design of multi-functional digital clock, you can set the alarm clock, similar to the broadcast station, the whole point of time)
-
-
0下载:
闹钟
工程说明
本工程包括矩阵键盘和数码管显示模块,共同实现一个带有闹钟功能、可设置时间的数字时钟。
案例补充说明
我们通过建立四个清晰直观的模块(数码管显示模块,矩阵键盘扫描模块,时钟计数模块,闹钟设定模块),以及建立完善的信号列表和运用verilog语言编写简洁流畅的代码,实现电子闹钟时、分、秒计时以及设置、修改、重置等功能。(alarm clock
Engineering descr iption
This project includes matrix keyboard and di
-
-
1下载:
自己开发的电子时钟小程序,通过数码管显示时间,key1和key2控制校时校分,key3切换时钟模式和闹钟模式,切换到闹钟模式再按key1和key2即可设定闹钟时间。key4控制开启/关闭闹钟。有整点报时功能。(Self developed electronic clock applet, through the digital tube display time, key1 and key2 control time correction, Key3 switch clock mode and
-
-
0下载:
基于Basys2的带测温、定闹钟、温度上下限报警装置的数字电子钟,可自动处理闰年闰月。(Basys2 temperature measurement, alarm clock, temperature alarm device based on digital electronic clock, can automatically handle leap year leap.)
-