搜索资源列表
DPRAM
- 网络控制器和链路控制器的CPU即是通过读写双端口RAM芯片完成网络层与数据链路层的原语交互。mailbox中写入的是原语的类型，而双端口RAM的其它存储空间则存放各种服务原语的参数。-network controller and the CPU controller link is through reading and writing dual-port RAM chip to complete the network layer and data link layer of the orig
firm_usb
- DSP通过双口RAM和ISP1581实现下位机的USB固件程序，调试通过，上位机驱动和读写例程，如果下载多的话再传-DSP through dual-port RAM and ISP 1581 to achieve lower computer's USB firmware and Debugging, PC drivers and routines to read and write, if you download are so tame
allidt_20020616.tar
- idt的双口ram的读写接口程序，verilog 代码，并且有测试文档-Employing a dual-port ram reader interface program, Verilog code, and a test document
sram
- 单片机写双口RAM，包括读写是否一致的自动检测-Microcontroller to write dual-port RAM, including the automatic detection of the consistency of read and write
dual_RAM
- vhdl语言编写的双口ram及testbench,模块可以在modelsim里进行时序和功能仿真。-vhdl language of the dual-port ram, and testbench, modules, conducted in the modelsim timing and functional simulation.
VHDL
- 双口RAM模块源代码（VHDL）,用于开发FPGA的双口RAM，可以直接下载到工程中使用。-Dual-port RAM module source code (VHDL), for the development of FPGA' s dual-port RAM, can be directly downloaded to the project use.
verilog_RAM
- verilog 实现的一个双口RAM及其控制模块.我通过先存入64个数据在读出仿真通过。-verilog implementation of a dual-port RAM.
USBMeasureAndControl
- 基于USB的数据采集系统，使用两个8051控制和双端口RAM,包含电路设计原理图-USB-based data acquisition system, using two 8051 control and dual-port RAM, including circuit schematics
Example-b4-1
- Altera基本宏功能的产生和实现方法.定制一个双端口RAM，DualPortRAM,Quartus II仿真器中做门级仿真,在ModelSim中对这个工程进行RTL级仿真.-Altera basic macro functionality of the generation and realization. Customize a dual-port RAM, DualPortRAM, Quartus II simulator to do gate level simulation, on t
ram_dp_sr_sw
- dual ram port in verilog
equivalent_sample
- 基于FPGA的等效采样系统设计，包含状态机设计，双口ram使用方法，分频设计等-FPGA-based equivalent sampling system design, including the state machine design, dual-port ram usage, frequency design
DualPortRam
- A systemc implementation of dual port ram module. A vcd file as the sample result is also included. There is a generator for reading/writing data from/to the two ports of the RAM, the tracing of which is offered using the sc_trace API.
DU-RAM
- 本程序是一个双口RAM的读写程序，在很多工程中，特别是存储器中运用广泛-This program is a dual-port RAM read and write procedures, in many projects, especially the extensive use of memory
ram
- 利用verilog实现的双口RAM。文件包含工程文件，仿真文件，使用方便。-Using verilog implementation of dual-port RAM. File contains the project files, simulation files, easy to use.
dppramm
- 基于fpga的双口ram的设计与实现，好东西，希望大家喜欢-The dual-port ram fpga based design and implementation of good things, hope you like
Port-RAMs
- 介绍双口ram功能，进一步了解在fpga上怎么设计一个双口ram-Introduced the dual-port ram function to learn more about the fpga on how to design a dual port ram
ram
- 练习调用双口ram,fpga自产生65536个递增数，6.25Hz输出，在20ms内读出。-Exercises called dual port ram, fpga increasing number of self-produced 65536, 6.25Hz output within 20ms readout.
RAM
- Nios ii双口ram,用于MCU通过nios ii进行双口ram通信,verilog格式.-Nios II dual port RAM, for MCU dual port RAM communication, through the Nios II Verilog format.
DULE-RAM
- 基于VERILOG的双口ram例子，比较简单，不是很复杂，入门了解就可以了。-Based on dual port ram VERILOG example, the relatively simple, not very complicated, entry understand it.
Dual-RAM
- DSP EMIF双口RAM和FPGA实现高速通信-DSP EMIF dual-port RAM and FPGA to achieve high-speed communications