搜索资源列表
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FPGA实现RS-232串口收发的Verilog程序,已经调通。
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RS232串口通信协议,verilog实现,通过FPGA完全调通。,RS232 serial communication protocol, verilog achieved entirely through the FPGA transfer pass.
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完整的RS232 Verilog源代码,支持波特率可调,支持调试命令,配合串口调试工具,可作为FPGA开发中的调试平台。-Full RS232 Verilog source code, support for baud rate is adjustable to support debugging command, with the serial debugging tools can be used as the debugging FPGA development platform.
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verilog RS232信号解码模块。为在FPGA中的verilog代码。-verilog RS232 control module。
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fpga上的串口驱动程序,包括接收主机来的数据(deserial)和发送由FPGA产生的数据(serial).该程序的调试需要借助串口调试助手-serial port driver on the fpga, including the receiving host to the data (deserial) and send the data generated by the FPGA (serial) to pc. The program needs the serial debug deb
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Verilog编写的串口RS232收发字符串程序,使用FIFO作为数据缓冲区,有效收发字符串长度为256字节,解决了利用串口调试工具与FPGA通讯只能收发单字节的问题.-Programs for uart/RS232, it can receive and transmit strings.
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RS232 verilog coding 全参数化设计 可以自己设定波特率 时钟频率等 完全FPGA实现调通-RS232 verilog coding the entire parametric design can set the baud rate clock frequency of FPGA to achieve complete transfer pass
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RS232设计,硬件测试通过,VERILOG实现的,比较好的哦-RS232 design, hardware test, VERILOG realized, oh good
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RS232(UART)串口传输,通过了FPGA验证功能正确-UART RS232 verilog HDL
FPGA xilinx
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实现FPGA的RS232串行通信,采用verilog语言编写,下载到芯片上就可以使用-FPGA implementation of the RS232 serial communication, using verilog language, can be downloaded to the chip using
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本设计是PC和FPGA的串口通信的程序,用的是VERILOG语言,调试成功,用户可根据自己的项目稍作改动。-The design is a PC and the FPGA' s serial communication procedures, using a VERILOG language, debugged, the user can make a little change according to their own projects.
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FPGA的学习,熟悉QuartusII软件的各种功能,各种逻辑算法设计,接口模块(RS232,LCD,VGA,SPI,I2c等)的设计,时序分析,硬件优化等,自己开始设计简单的FPGA板子。
③、NiosII的学习,熟悉NiosII的开发流程,熟悉开发软件(SOPC,NiosII IDE),了解NiosII的基本结构,设计NiosII开发板,编写NiosII C语言程序,调试板子各模块功能。-Verilog语言的学习,熟悉Verilog语言的各种语法。
②、FPGA的学习,熟悉
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Verilog 基于FPGA的直接RS232串口测试-Verilog FPGA-based test of direct RS232 serial port
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FPGA串行通信口RS232-485构建,RS232和485有选择控制,源程序基于QuartusII6.0用Verilog语言撰写。-FPGA serial communication port RS232-485 build, RS232 and 485 to selectively control, source-based QuartusII6.0 written in Verilog language.
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基于Verilog 语言FPGA RS232 通信程序,已测试通过-FPGA RS232 Communication Program using Verilog Hard Descr iption Language
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Verilog uart example, RS232的Verilog例子。PC 发送一个字节(byte)到板子(FPGA),板子回发一个(byte+1).例子简洁,有注释。用到PLL,而且有3:2次数据采用-Verilog uart example,Verilog RS232 example,it s easy to understand, PC send 1 Byte RS232 code to FPGA, FPGA return 1 tht code,but Byte+1, Using P
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本程序是在FPGA里面模拟RS232串口,并在已调试成功。-This procedure is simulated in FPGA RS232 serial port, and in the debugging success
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FPGA rs232串口收发程序,3个程序任意选择,全部可用-FPGA rs232 serial transceiver procedures, three procedures arbitrarily selected, all available
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串行通信程序,Verilog示例程序,通用RS232(Serial communication program)
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Verilog写的UART 协议。可用于FPGA RS232接口实现。(The UART protocol written by Verilog. It can be used for the implementation of the FPGA RS232 interface.)
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