搜索资源列表
H16550_2[1].0V
- 专门做处理器和周边接口的著名ipcore厂商CAST出品的UART H16550 ，包含完整的使用说明手册、testbench、可综合，如果被网站认可，将继续上传其余的几个更好的core。-specialized processor and peripheral interfaces famous ipcore CAST product manufacturers UART H16 550, including full use manual testbench can be integrate
USB IPcore（带说明）
- USB IPcoreIP核，包含文档（带说明）-USB IPcoreIP nuclear contains documents (with the note)
IPCORE
- 最简单的八位单片机8051的源代码，支持MCS51的汇编语言，可综合，VHDL语言描述，有测试环境-most simple eight SCM 8051 source code, a compilation support MCS51 language, integrated, VHDL descr iption of a test environment
eathnet
- 百兆以太网mac和mii的vhdl源程，作IPcore的时候非常有用-Fast Ethernet MII and the VHDL source way for IPcore very useful when
IPcore
- 基于EP3C25的Altera SDI IP核的使用-EP3C25 Altera SDI IP
EtherCAT IPCore Altera
- Ethercat的iPcore，有研究Ethercat的朋友可以-IPcore of the Ethercat, you can refer to it if u have needs
ddc_FPGA
- 简要介绍了数字下变频的设计，通过采用xilinx的ise软件，ipcore的调用实现-Briefly introduced the design of digital down conversion, through the use of ise the xilinx software, ipcore call the realization of
I2C
- i2c ipcore of altera fpga that uses ahdl lauguage.
VHDL-8031-IPCore
- this a ipcode of 51 mcu!-this is a ipcode of 51 mcu!
EndSdramController
- SDRAM IPCore控制程序源代码。 请问有无usb原码-SDRAM IPCore source code control procedures. I would like to ask whether the original code usb
iic
- i2c ipcore,已经验证过可以使用-i2c ipcore
100M_mac
- 100M-MAC-IPcore（从OPENCORE下载)；-100M of the MAC
standard_sim_tb
- xilinx CTC IPcore(encoder 和 decoder）的标准测试，未经信道加噪-the standard test of xilinx CTC IPcore (encoder and decoder) , without the channel with noise
i2c-IPcore
- i2c的完整可用的Verilog代码，包含testbench.-i2c complete Verilog code is available, including the testbench.
IPcore
- 非常有用的IP核资源，里面包含了JTAG,MEMORY,PCI，SDRAM和USB1.1等内容，期望对大家有用-A very useful IP core resources, which includes the JTAG, MEMORY, PCI, SDRAM, and USB1.1 and other content, expectations for all of us
Xil3SD1800A_MIG
- 基于xc3sd1800afg676的开发板的DDR2的控制器的IPCORE，提供完整的代码和UCF。系统时钟频率为125Mhz。-The development board based on xc3sd1800afg676 DDR2 controller of IPCORE, provide a complete code and UCF. System clock frequency of 125Mhz.
IPcore
- 十五个IP核。。。比较常用的，大家可以参考-failed to translate
ipcore
- quartus8.0的LPM参数化宏模块ipcore应用-quartus8.0 the LPM parameterized macro module ipcore application
13.1-Custom-IPcore
- 基于zynq-7000开发板的自定义IPcore源程序及工程，可运行在ISE14.4环境下。-based on zynq-7000 board with IPcore sourc project and .bit file，run in ISE14.4
国产FPGA参考设计IPCORE_UART_example_M5&M7
- 国产FPGA的UART参考设计IPCORE源代码。 The IP provides two kinds of simplified interface connected to EMIF bus and AHB bus for communication with 8051 core and ARM core.The two kinds of interface are full-duplex serial communication interface. Support programmabl