搜索资源列表
muxfile
- 基于FPGA设计ADC0809采样控制器原代码-FPGA-based design ADC0809 Sampling Controller source
c822.rar
- 关于FPGA的一个设计,用FPGA来实现数字示波器,采样时钟为250M,On a FPGA design, FPGA to realize digital oscilloscope, the sampling clock for the 250M
sin.rar
- 用Verilog语言在FPGA内实现一256个采样点的正弦波,已尝试,挺好用的~~~,Verilog language used in the FPGA to achieve one of the 256 sampling points sine wave, I have already tried it, very useful~ ~ ~
bridge
- FPGA和A/D转换芯片ad7862的IP,可实现4路数据的采样和读取。 用verilog实现的-FPGA and the A/D conversion chip ad7862' s IP, can achieve 4-way data sampling and reading. Achieved with verilog
ADconverter
- 基于FPGA的A_D转换采样控制模块的设计-A Design of the A/D Convertion Sampling Control Module Based on FPGA
EP1C3_12_7_SPCTR
- 基于FPGA的信号采集及频谱分析,用VHDL编写,压缩包里是Quartus下的工程。AD采样用状态机实现,并存入LPM_RAM。设计了一个UART模块(也是状态机实现的),可将数据发到PC机上。-FPGA-based signal acquisition and spectral analysis, prepared with VHDL, Quartus compression bag is the next project. AD sampling state machine used to
caiyang
- 种用FPGA 实现对高速A/ D 转换芯片的控制电路,系统以MAX125 为例,详细介绍了含有FIFO 存储器的A/ D 采样控制电路的设计方法,并给出了A/D 采样控制电路的V HDL 源程序和整个采样存储的顶层电路原理图.-Species with FPGA to achieve high-speed A/D conversion chip control circuit, the system as an example to MAX125 details FIFO memory cont
DigitalOscilloscope
- 本数字示波器以单片机和FPGA为核心,对采样方式的选择和等效采样技术的实现进行了重点设计,使作品不仅具有实时采样方式,而且采用随机等效采样技术实现了利用实时采样速率为1MHz的ADC进行最大200MHz的等效采样。同时系统还具有可测2mV小信号、波形存储回放、测频、触发沿选择、校准信号输出等功能。-The digital oscilloscope and a single-chip FPGA as the core, the choice of the sampling methods and
DDS
- 本代码可以用于产生正余弦信号波形,利用FPGA内部的ROM放置一个正余弦采样点的数据表格,通过循环取址的方法,实现波形连续输出。-This code can be used to generate positive cosine signal waveforms, using FPGA' s internal ROM to place a sampling point is the cosine of the data tables, the circulation method of t
high_speed_data_recovery
- 1. 程序的功能是:高速串行数据的恢复. 2. 其基本原理是:利用过采样,检测串行数据的边沿跳变,然后根据边沿提取处在数据相位正中央相邻的抽样值,将串行数据恢复过来。 3. 此程序是verilog 语言编写,用于xilinx virtexE 系列的FPGA-1. Program functions are: high-speed serial data recovery. 2. The basic principle is: the use of over-sampling to det
2345676588FPGAxiebofenxi
- 本文给出一种基于FPGA的新型谐波检测系统的设计方案。在该方案中,采用FPGA实现快速的FFT运算,采用数字锁相环来同步被测信号,以减小由非同步采样所产生的误差并给出实现的设计实现。数字锁相环和FFT算法用VHDL语言设计实现,该方案能提高谐波分析的精度以及响应速度,同时大大地精简了硬件电路, 系统升级非常方便。-This paper presents a new FPGA-based harmonic detection system design. In the scheme, using
shishi
- 基于FPGA的实时采样系统设计!双口ram典型应用!-FPGA-based real-time sampling system!
The-FPGA-high-speed-data-acquisition
- 摘要:介绍了现场可编程门阵列FPGA(Field Programmable Gate Array)器件XCS30的主要特点、技 术参数、内部结构和工作原理,I}述了其在电力系统高速数据采集系统中的应用实例。电力数据采 集装置—馈线终端单元(FTU)需要监测多条线路的电压和电流,实时性要求高,充分利用FPGA 的并行处理能力,对输入信号实行同时采样、分时进行A/D转换,通过在FPGA片上构建的DRAM 进行数据的快速传输。FPGA在系统中承担了较多的实时任务,使DSP芯片TMS32
FPGA-multi-channel-sampling-system
- 基于FPGA多通道采样系统设计论文资料,特地发出来,希望对不熟悉这块的朋友有帮助吧!单片机学习网:http://www.emcuc.com,欢迎大家转载!-Based on FPGA multi-channel sampling system design paper data, specially issued to the hope that friends are not familiar with this! MCU Learning Network: http://www.emcuc.
ads7841_control
- 本程序是fpga控制ads7841采样,fpga中用状态机来写时序,亲测可用-This procedure is fpga control ads7841 sampling, fpga using state machine to write timing, pro-test available
Fpga-based-ADC-sampling-voltage-
- 基于fpga的ADC采样电压用,显示在数码管上。verilog语言。-Fpga-based ADC sampling voltage used, displayed on the digital pipe. verilog language.
hf_mot
- 电机驱动及编码器同步采样,内部兼具多重滤波采样处理算法。(Motor drive and encoder synchronous sampling, the internal multi filter sampling and processing algorithm.)
AD7655
- 利用Verilog语言,在FPGA中实现对AD7655 16位高速高精度的采样芯片的采样数据进行读写(The Verilog language is used to read and write the sampled data of AD7655 16 bit high speed and high precision sampling chip in FPGA)
t
- 用于NI单片机电流电压采样以及显示,其中含有部分程控电流与程控电压,可用于并联限流限压电路。(It is used for sampling and displaying the current and voltage of NI single-chip microcomputer. It contains part of program-controlled current and program-controlled voltage and can be used for parallel
ADC9481
- 利用FPGA对AD9481进行采样,亲测有用(Sampling ad9481 with FPGA)