搜索资源列表
Verilog_traffic
- Verilog 的交通灯的例子。源代码中有详细的注释。-Verilog traffic lights examples. The source code for detailed comments.
Traffic_Light_Final
- Traffic light written with Verilog-written with Verilog
cpldtraffic
- 交通灯信号的ｆｐｇａ实现。通过ｖｅｒｉｌｏｇ语言编程，在ｆｐｇａ上调试通过。-traffic signal lights they simply achieve. Through the Verilog language programming, they simply passed on debugging.
traffic_light
- 一个用verilog编写的模拟交通灯控制的源代码。模拟在十字路口的双向交通灯。-a prepared using Verilog simulation of traffic lights to control the source code. Simulation at the crossroads of two-way traffic lights.
trafficontrol
- 使用verilog编写的交通灯控制程序，各方向通行时间可调，绿灯5s闪烁，在maxplus下调试通过，附仿真波形，在EP系列实验板上测试成功-use Verilog prepared by the traffic lights control procedures, the passage of time adjustable direction, green 5s flickered in maxplus under debugging, simulation waveforms with t
easylight
- easydetect程序，是交通灯的verilog实现-easydetect process, the traffic lights to achieve verilog
Verilog_Development_Board_Sources
- 朋友，我是Jawen.看到先前上载的一套CPLD开发板的VHDL源码挺受欢迎的，现在就将她的Verilog源码也一并贡献给大家：8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,四位比较器,7段数码管,i2c总线,lcd液晶显示,拨码开关,串口,蜂鸣器,矩阵键盘,跑马灯,交通灯,数字时钟-friends, I Jawen. previously seen on the set of CPLD Development Board VHDL source code q
JTD
- 带左拐的交通灯设计与25进制的加法计数器，Maxplus2软件中的Verilog语言编写-Neunggok with the design of traffic lights at 229 with the addition of 25 counters, simulated software Verilog language
Traffic_sign_co-design_of_C_and_Verilog
- This is an extension of sign example. You can design your own traffic sign by using Verilog. And the result from Verilog can be seen by the attached C file.
Datasheets.rar
- de2板的相关硬件的芯片资料，详细的介绍了de2板上各主要芯片的详细资料,de2 board chip hardware related information described in detail the main chip board de2 details
FPGA_traffic-lights
- 基于FPGA实现的交通灯verilog演示程序-FPGA-based implementation of the traffic lights verilog demo
traffic_lights
- 用Verilog实现的交通信号灯控制，主干道和支路通行的时间不相等-Using Verilog implementation of traffic signal control, the trunk road and the slip is not the same passage of time
jiaotongdeng
- 这程序是利用状态机来控制交通灯verilog码-This procedure is the use of state machine to control the traffic lights verilog code
Mealy_TrafficLight
- 基于FPGA交通控制器的Mealy状态机实现(Mealy state machine controller based on FPGA traffic)
ve_lab
- verilog语言实现智能交通灯控制系统，除现有交通灯系统基本功能以外，还包括未来交通可能出现的一些需要智能控制的情况进行自定义规则（比如检测车流量来控制交通灯持续时间，高峰期主干道绿灯时间将加倍等规则）(The project was completed by myself about two months ago. I think it will be useful for traffic control system.But there are many points needed to
Verilog_traffic
- 若农场路无车辆，则在高速路保持绿灯。在探测农场路有车辆，高速路上的交通灯应由绿到黄，再到红，并允许农场路方向灯变绿，绿灯亮一段时间，由绿变黄再到红。(If there is no vehicle on the farm road, keep the green light on the highway. There are vehicles on the farm road, the traffic lights on the high speed road should be green to
traffic2
- 数电课程设计，交通灯，基于Quartus II编写(Digital electric course design, traffic lights)
hld
- 实现红绿灯功能，增加PASS功能，使红灯强制复位到3s倒计时(Realize the function of the traffic light, increase the PASS function, make the red light reset to the 3S countdown)
traffic light
- Verilog实现交通信号灯的控制 及硬件的集成(Control of traffic lights by Verilog)
traffic_light
- 使用Verilog编写交通灯控制代码，能够直接进行运行仿真。(Using Verilog to write traffic light control code, can run the simulation directly.)