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and_or
- veilog 代码 用户可以直接调用,作为底层模块。同时已经编译成功,可以作为基本单元库。-veilog code user can derict use it for the base mode.
statemachine_mult
- veilog实现的状态机乘法器.可以参考-veilog achieve the state machine multiplier. Can reference
serial_communication
- 串口操作源代码,本代码采用veilog hdl语言编写,并经过本人多次验证。-source code, the code used veilog HDL language, and after I repeatedly verified.
led_decode
- 用veilog HDL编的七段译码显示电路。自己做的第一个此类程序,编译仿真通过,感觉不错-veilog HDL series with paragraph 107 of the decoder show circuit. I have done the first such procedure, compile through simulation, feeling good
count_usebasketball
- 一个小程序,用Veilog HDL编写的,可以用于篮球比赛的倒计时牌,已在max-plusII上仿真通过。-a small program, prepared by the Veilog HDL, can be used for the basketball game countdown. have max-plusII on through simulation.
24bitdisplay
- 一个VEILOG HDL程序,可以直接应用,
1602_B
- veilog写的用在FPGA上,1602的LCD 驱动程序,调试通过-veilog writing used in the FPGA, 1602, the LCD driver debugging through
16FFT
- 基于FPGA的16点FFT实现VEILOG-FPGA 16FFT VERILOG
CICverilog
- CIC滤波器的veilog代码,需要的硬件少。-CIC digital filter code
sram_controller
- sram 控制器用verilog语言实现-sram controller is programed by veilog
c3
- 在FPGA实现的加法器实现的Veilog代码,应用软件为赛林思公司的ISE9.1-adder Veilog
DDRSDRAM
- DDR SDRAM的veilog hdl程序,经过验证 效果不错-DDR SDRAM' s veilog hdl procedures, good results verified
verilogHDL
- RS(31,15)译码关键步骤的veilog HDL算法实现,包括关键方程求解,错误位置估计,错误值计算等-RS (31,15) decoding a key step in the algorithm veilog HDL, including key equations, position estimation error, error value, such as
FPGA
- FPGA的作品,比较正规的veilog代码-FPGA-works, a more formal veilog code
echo
- 硬件描述语言 veilog 回声效果实验-Hardware descr iption language veilog echo effect experiment
lcd1602andveilog
- 非常好的程序,大家可以下载来学习-Very good program, you can download to learn ~~~~~~~~~~~~~
spi_verilog
- SPI protocol using veilog HDL
verilog_divdier
- veilog中的常用分频器,包括2分频 4分频 8分频等 开发环境为ise8.2-veilog commonly used in the dividers, including the 2 frequency divided by 4 divided by 8, such as development environment for ise8.2
led_2_0816
- veilog程序实现在fpga上流水灯循环显示(Veilog program to achieve in fpga water lamp cycle display)
DES veilog 源码
- DES veilog 源码 apb 总线 控制 简单易学 清晰明了