搜索资源列表
I2C
- Verilog实现的I2C协议，直接在ISE下打开就可以-Verilog implementation I2C protocol to open directly in the ISE can be
UART
- Verilog实现的UART程序，用ISE打开工程文件即可-Verilog implementation UART program, open the project file with the ISE can be
i2c_AT24C04_Verilog
- 用Verilog HDL语言编写的AT24C04程序，并用数码管显示，已经过测试，很好用-With the Verilog HDL language of the AT24C04 procedures and use digital tube display, has been tested, very good to use--
APB_I2S
- 这是一个中文版的i2S总线，对搞硬件的朋友会有帮助的-This is a Chinese version of the i2S bus, friends are engaged in the hardware would be helpful
PISO
- It is then register ( shifter) PISO ( Parallel - in, serial - out)-It is then register ( shifter) PISO ( Parallel- in, serial- out)
fft
- 基4快速傅里叶变换，涉及cordic算法，可以用来学习-fft
TLC5510
- tlc5510的vhdl程序，有详细的工程文件，为初学者提供很好多的资料-tlc5510 of vhdl procedures, detailed engineering documents, in order to provide a good amount of information for beginners
Interface
- 基于FPGA环境下ISA总线模块程序实现，已通过调试-FPGA-based ISA bus module environment program implementation, has passed the commissioning
zlg_avalon_rtl8019
- 周立功公司rtl8091IP核，接avalon总线，可实现以太网通信，有详细的说明-ZLG' s rtl8091IP nuclear, then avalon bus, Ethernet communications can be realized, a detailed descr iption of
camera_link
- 对camera_link接口传输过来的信号进行格式转换，将16bit并行转换成串行输出-Right camera_link interface transfer over the signal format conversion will be converted into serial 16bit parallel output
DAC_TLV5616
- tlv5614的驱动程序，用verilog语言编写的，fpga芯片为altera公司的ep2c35。 调试成功放心使用-tlv5614 driver, using verilog language written in, fpga chips altera company ep2c35. Assured the success of the use of debugging
50846288C
- verilog 硬件编程实现bpsk调制-verilog hardware, programming bpsk Modulation
DDS
- 同时用verilog 语言编写dds原代码用于生成正余弦波，并在FPGA平台进行验证-described dds direct digital frequency synthesis of the basic tenets addition to the use of verilog prepared dds source used to produce sine, and FPGA development platform for verification
async_fifo
- verilog HDL写的异步fifo代码及测试平台，直接可用，可生成RTL代码-asynchronous fifo write verilog HDL code and test platform, directly available, can generate RTL code for
c_FPGA
- RS232设计，硬件测试通过，VERILOG实现的，比较好的哦-RS232 design, hardware test, VERILOG realized, oh good
c_xapp851
- 这是xilinx应用指南xapp851的中文版本。本应用指南描述了在 Virtex™ -5 器件中实现的 200 MHz DDR SDRAM （JEDEC DDR400 (PC3200) 标准）控制器。本设计实现使用 IDELAY 单元调整读数据时序。读数据时序校准和调整在此控制器中完成。-This is the xilinx application note xapp851 the Chinese version. This application note describes
SCRAMBLER
- 32位扰码器的verilog代码，编译通过-The Verilog code of 32_bit scrambler
FPGA_cy7c68013
- 本工程包括FPGA程序和CY7C68013固件程序。 上位机程序通过EZ-USB CONTROL PANNEL 来测试。-The works include the FPGA programs and CY7C68013 firmware. Host computer procedure EZ-USB CONTROL PANNEL to test.
ADS7852
- FPGA采用VHDL语言驱动ADS7852的程序,-FPGA and ADS7852
Chapter-8
- Verilog编写的CAN通讯程序，通过验证，并支持CAN1.1,CAN2.0b协议。-CAN communication procedures written in Verilog, through validation, and support CAN1.1, CAN2.0b agreement.