verilog code for modified booth multiplication using maxplus2

verilog程序源码，实现两个16bit数乘法，使用booth算法，一种基于状态机实现，分层层次为datapath与controller两个子模块，testBench测试通过 -verilog program source code, and two 16bit multiplication using booth algorithm, based on the state machine implementation, the hierarchical level for the da