搜索资源列表
S12_AudioLoopback_DAV_MIC
- 从MIC输入一段音频然后，再从AOUT的接口播放出来的verilog 的代码-Input from the MIC for some audio and then AOUT interface from broadcast in the Verilog code
EchoClear
- vc++源码，消除回声处理， 可用于音频处理； -vc++ source code, deal with the elimination of echo can be used for audio processing
DecoderAudio
- 本程序为SDI的音视频分离Verilog程序，信号通过分离后，可以分离出视频和音频信号。-This procedure for the separation of SDI audio and video Verilog program, the signal after the separation, can be isolated video and audio signals.
NIOS_i2sound_demo
- 在nios系统开发中的驱动i2c音频电路的代码,包括verilog代码,与相应的驱动代码-In the nios system development in the driver i2c code for the audio circuitry, including the verilog code, and the corresponding driver code
ADC
- a verilog code about dac of audio codec on fpga board.
DAC
- a verilog code about dac of audio codec on fpga board.
ANC_LMS
- verilog描述的基于LMS的自适应噪声消除器ANC算法。用于数字音频处理。-The verilog Descr iption LMS-based adaptive noise canceller ANC algorithm. For digital audio processing.
AD_FIFO
- 简单的Verilog程序，针对音频实验板的AD到DA调通试验，下载执行前请按照自己试验环境更改设置-Simple Verilog program for test the AD to DA loop of universal audio test platform. Please configure it according to the test environment before download and implement the program to FPGA
Spdif_out
- S/PDIF Audio output example for FPGA (in Verilog)
NEW AUDIO CODEC DEVELOPMENT CODE BASE
- Hi friends, This consists of a complete system written in Verilog/TCL for VGA DISPLAY OF RESULTS INPUTTED THROUGH AUDIO CODEC AND COMPLETE SYSTEM LEVEL DESIGN ON VERILOG.
DE1-verilog
- Altera公司推出最新开发板DE1。该资料为DE1的FPGA 代码，包括ADC，音频处理，视频输出等，供大家参考使用。-Altera Corporation introduced the latest development board DE1. The data for the DE1 FPGA code, including the ADC, audio processing, video output, etc., for your use and reference.
audioloopback
- Verilog program for running a audio loopback system for AC97 codec.
DE1_SoC_Audio
- 声音录制、播放的Verilog代码，用于Altera Cyclone V SOC. 写时适配的是DE1-SOC开发板。-Audio recording and playing code for Altera Cyclone V SOC FPGA. Code was designed for DE1-SOC development board, but could be reference for other boards.
si3000
- Verilog code for control ICs SI3000 audio coder on FPGA
Nexys4FFTDemo-master
- A simple Verilog example of a 4096pt FFT on analog input from a Nexys 4 XADC. The input is sampled at 1MSPS, oversampled to produce 14-bit samples at 62.5kHz, then sent to the FFT processing modules and passed through to PWM Audio out. The FFT output
Audio_whistle_suppressor
- 探讨了一种数字移频法啸叫检测与抑制音频功率放大实验测试系统设计方案，用来实现带啸叫检测与抑制音频功率放大．系统以 FPGA 为控制核心(This paper has designed a testing system for an audio power amplifier with howling detection and suppression which is used to achieve howling detection and suppression audio power am