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DDR_SDRAM_use_in_embedded
- 很多嵌入式系统，特别是应用于图像处理与高速数据采集等场合的嵌入式系统，都需要高速缓存大量的数据。DDR（Double Data Rate，双数据速率）SDRAM由于其速度快、容量大，而且价格便宜，因此能够很好地满足上述场合对大量数据缓存的需求。但DDR SDRAM的接口不能直接与现今的微处理器和DSP的存储器接口相连，需要在其间插入控制器实现微处理器或DSP对存储器的控制。-many embedded systems, especially for image processing and hi
Sun86
- SDRAM仿真文件，主要用于测试SDRAM的控制程序是否正确。-SDRAM simulation files, mainly used for testing control procedures SDRAM is correct.
sdram_vhdl_lattice
- sdram的控制程序，程序分为控制端口模块、时钟模块、数据传输模块及刷新等模块-sdram control procedures, process control port is divided into modules, clock modules, data transfer module and refresh modules
my_K4S641632K_4_1M_16
- 于对Tk提供的控件及其众多的属性不熟悉，边用边学边查书既不系统又费力；二来是由于没有下功夫学习、参考现成的例子（深入地学习一个由经验丰富的开发人员创建的Tcl程序，可以起到事半功倍的效果，获得许多宝贵的编-sdram control for K4S641632K_4 , can be used for Image processing , it is just a simple one which can be just used for test and study. let us day d
yadmc_latest.tar
- 基于wishbone总线的sdram控制器-sdram control with wishbone interface
EXINT_module
- 本文件夹中的代码是“外部中断模块”的相应代码。 exint.c 该文件是EXINT代码，包括main主函数、中断服务程序等。 EXINT.pdf 该文件是C6713外部中断EXINT原理图，至于C6713的其他部分（如SDRAM、FLASH等）和部分控制信号、电源信号都略去。读者朋友可参考另外相关的章节。 -The code in this folder is " external interrupt module" of the correspon
GPIO_module
- 本文件夹中的代码是“GPIO模块”的相应代码。 GPIO_LCM.c 该文件是GPIO模拟时序，实现SPI协议的代码。 GPIO.pdf 该文件是C6713的GPIO连接LED和LCM模块的原理图，至于C6713的其他部分（如SDRAM、FLASH等）和部分控制信号、电源信号都略去。读者朋友可参考另外相关的章节。 -The code in this folder is " GPIO module" of the corresponding code.
sdram-ctrl
- FPGA sdram 全页模式控制，用verilog语言写的，非常的精简，控制方便-FPGA sdram full-page mode control, written in verilog language is compact, easy to control
SDRAM_verilog
- 关于FPGA控制SDRAM笔记详细的资料，verilog写的程序，注释也很详细，值得参考。-FPGA control SDRAM notes detailed information, the program written in Verilog, comments are also detailed, it is also useful.
sdram_mdl
- SDRAM的verilog程序控制模块，希望对大家有帮助-SDRAM verilog program control module, we want to help
SD_SDRAM_LCM_PROJECT
- verilog控制SD卡与SDRAM之间数据传输及LCM显示，希望对大家有帮助-The verilog Control SD card with SDRAM between data transmission and LCM hope everyone
0801sdram_burst8_better
- sdram burst=8控制模块,比较好的实现控制-sdram burst =8 control module，it is good for you to use it
sdram_latest.tar
- sdram 控制器 verilog 源码-verilog source of sdram control
DDR2Controller
- DDR2 SDRAM Control Verilog RTL Code
DDR3L_H5TC4G4(8_6)3AFR
- The H5TC4G43AFR-xxA, H5TC4G83AFR-xxA and H5TC4G63AFR-xxA are a 4Gb low power Double Data Rate III (DDR3L) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density, high bandwidth and low power operatio
SDRAM-control
- 使用FPGA实现的SDRAM控制器访问代码，该代码的时序参数可调整-SDRAM controller FPGA implementation using the access code, the code is adjustable timing parameters
qingkei
- 加入重复控制，实现用SDRAM运行nios，同时用SRAM保存摄像头数据，使用大量的有限元法求解偏微分方程。- Join repetitive control, Implemented with SDRAM run nios, while saving camera data SRAM, Using a large number of finite element method to solve partial differential equations.
yeifou_v62
- 经典的灰度共生矩阵纹理计算方法，实现用SDRAM运行nios，同时用SRAM保存摄像头数据，DC-DC部分采用定功率单环控制。- Classic GLCM texture calculation method, Implemented with SDRAM run nios, while saving camera data SRAM, DC-DC power single-part set-loop control.
sdram_top
- 使用FPGA实现SDRAM逻辑控制器，适用于各种型号的FPGA-SDRAM control by verilog
11_sdram_test
- module sdram_test( input clk_50m, input reset_n, //sdram control output S_CLK, //sdram clock output S_CKE, //sdram clock enable output S_NCS, //sdram chip select output S_NWE, //sdram write enable output S_NC