搜索资源列表
DDR_MMC_JEDEC
- 关于DDR，DDR2,DDR3和MMC的标准规范。
rdf0011
- 用VerilogHDL遍写的ddr3控制器，使用了自带的ip核生成mig来进行读写。-Times to write with VerilogHDL ddr3 controller, use the ip core generator that comes with mig to read and write.
DDR3-SDRAM-Verilog-Model(1)
- contains the information and codes of DDR3 memory model
DDR3-SDRAM-Standard.pdf
- DDR3 Standard document,内存规格书，参考，详细-DDR3 STANDARD DOCUMENT
ug586_7Series_MIS-xi
- 有关于xilinx平台DDR3 ip core介绍-xilinx ip core
arbiter
- 仲裁器代码,DDR3 SDRAM控制用所给出，请大家参考，-arbiter for ddr3 sdram
DDR3L_H5TC4G4(8_6)3AFR
- The H5TC4G43AFR-xxA, H5TC4G83AFR-xxA and H5TC4G63AFR-xxA are a 4Gb low power Double Data Rate III (DDR3L) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density, high bandwidth and low power operatio
DDR3_Test
- ddr3基于ISE的测试仿真工程文件，配合开发板使用，适合ddr3入门者-ddr3 sim-documents for new learners
intr_priority_control
- 多种数据缓存ddr3，乒乓缓存优先级判断，优先将缓存紧急的数据类型读出ddr3.(A variety of data cache DDR3, table tennis cache priority judgment, priority will cache urgent data type read ddr3.)
FETIMX6UL
- IMX6UL 开发板原理图，带DDR3,NAND FLASH,ETH,UART,USB等丰富的外部接口。(SCH OF IMX6UL DEMO BOARD)
Micron_Memory_DDR_SDRAM
- ddr3 封装库 采用粉末冶金法制备了微米尺寸和准纳米尺寸的氧化镧粒子增强钼合金。(ddr3 package The molybdenum alloy reinforced by lanthana particles with the sizes of nanometer and micron was prepared by powder metallurgy)
ddr3
- FPGA实现DDR3控制器()
ddr3_test
- ddr3相关代码和基于ISE仿真调试，板级调试(DDR3 related code and simulation debugging based on ISE, board level debugging)
4Gb_DDR3L
- ddr3l datasheet,官网下载资料，有需要的话请下载。(ddr3l datasheet download from offical net ,please download for your need)
JESD79-3F-2
- 内容是pdf格式的ddr3的协议文档，仅供参考，不需要的请绕过，谢谢(The content is the PDF format of the DDR3 protocol document, for reference only, do not need to bypass, thank you.)
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- High speed PCB design example -DDR3