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CLOCK_co-design_of_C_and_Verilog
- A clock writing by Verilog which can count from 00:00 to 23:59. With a C file to see the simulation results. A co-design example of C and Verilog.
Find_medium_value_co-design_of_C_and_Verilog
- A code writing by Verilog which can find medium value. With a C file to see the simulation results. A co-design example of C and Verilog.
show_your_student_ID_number_co-design_of_C_and_Ver
- As the source code name, this code is writing in Verilog and also inside the folder there is a c code to see the simulation results from verilog.