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用VHDL语言在CPLD_FPGA上实现浮点运算
- 用VHDL语言在CPLD/FPGA上实现浮点运算的方法-in VHDL CPLD / FPGA achieve floating-point computation methods
ccmulVHDL
- vhdl语言编写的复数乘法运算器原代码，采用定点运算，并将复数乘法转为实数运算。-VHDL language in the plural multiplication with the original code using fixed-point computation. will the plural multiplication to real operations.
DSPfixedpoint
- DSP定点运算，主要说明定点的运算，以及在DSP芯片中的应用-DSP-point computation, mainly provides fixed-point arithmetic, and the DSP chip in the application
test_algorithm_menu
- TURBO译码性能AWGN信道测试（菜单式） 达到误帧限即可停止当前SNR点的测试，节省计算量-TURBO AWGN channel decoding performance test (menu type) to stop the current error frame is limited to the test SNR point, saving computation
Chapters_11-13_from_Pages_from_Internetworking_wi
- We have said that protocols allow one to specify or understand communication without knowing the details of a particular vendor s network hardware. They are to computer communication what programming languages are to computation. It should be a
测试程序
- 数字模块的通讯以及计算，工业自动化测量的实例(Communication and computation of digital modules, examples of industrial automation measurements)
di878
- Computation Method D phononic bandgap plane wave, Verify recognition algorithm based on palmprint recognition undergraduate complete set of online identity, Channel coding, modulation, channel estimation.