搜索资源列表
Verilog_PS2_RS232
- 实现PS/2接口与RS-232接口的数据传输， PS/2键盘上按下按键，可以通过RS-232自动传送到主机的串口调试终端上，并在数据接收区显示接收到的字符。 串口调试终端的设置：波特率115200，一个停止位，无校验位。 -The realization of PS/2 interface with RS-232 data interface, PS/2 keyboard to press the button, through RS-232 automatic transmissi
innovateasia2009
- 串口uart的vhdl，verilog，lattic实现原码-The uart serial vhdl, verilog, lattic realization of the original code
test_SPI
- 串口verilog代码，包括测试环境，仿真环境。-SPI design，verilog code，incude test and simulation scr ipt。
Verilog
- 该代码是Veriloghdl语言实现的串口通信，经过FPGA板子下载验证通过，读者可以使用-The code is Veriloghdl language of the serial communications, after verification by FPGA board download, readers can use
VHDL1
- 用verilog写PCI总线驱动的可以看看，大家交流一下，最近在弄PCI多串口扩展卡。-PCI bus with verilog was driven to look at, to share what, and more recently worked on PCI serial expansion cards.
async_receiver
- 用Verilog编码实现的串口通信接收代码-With Verilog coding of serial communication receiving code
UART-DISPLAY
- lcd 显示，Verilog语言，串口接收数据，并在LCD中显示，波特率9600，包括主文件，LCD控制文件，波特率发生文件-lcd display Verilog language, serial port to receive data, and the LCD display, baud rate of 9600, including the master file, the LCD control file, the baud rate generator file
UART_verilog
- UART串口verilog代码-The UART serial verilog code ..........
verilogUART
- verilog实现的串口实现代码，可以直接复制使用-verilog achieve serial implementation code can be copied directly use
chunhoutongxin
- 串口通信verilog语言实现带程序和实验结果-Serial communication verilog语言实现
FPGA-rs232(verilog)-2
- FPGA rs232串口收发程序，3个程序任意选择，全部可用-FPGA rs232 serial transceiver procedures, three procedures arbitrarily selected, all available
uart
- 该源码包是uart串口协议的verilog语言模型，主要包括了3个部分：波特率产生模块，uart接收模块，uart发送模块。(The source package is UART serial protocol Verilog language model, including 3 main parts: baud rate generation module, UART receiver module, UART transmission module.)
LAB9_UART
- Verilog串口收发的程序及说明。。。。。。(Verilog rx_uart r_uart x_uart)
SPI协议的Verilog_实现
- spi串口原理介绍，并附有verilog编程代码，有助于在FPGA上实现。(The principle of SPI serial, and with a Verilog programming code, contribute to the implementation on FPGA.)
Chuankou
- 实现8位串口的接收和发送模块，将串口接收和发送模块分成了几个小模块进行设计。方便之后的bug的修改。(Receiving and sending module of 8 bit serial port)
uart_fifo_n
- verilog 带fifo的串口收发模块(verilog uart with fifo)
verilog
- lcd1602 12864显示程序代码，串口传输数据代码(lcd1602 12864 code,UART code.)
FPAG UART Verilog
- FPGA实现URAT，实现异步串口收发控制(FPGA implements URAT to realize asynchronous serial port and transceiver control)
Tx
- 利用verilog实现串口发送，每次按键一次发送一次数据，按键模块进行了消抖处理(Using Verilog to realize serial port sending. Each button sends one data at a time, and the key module performs buffeting processing.)
基于FPGA与PC串口自收发通信-Verilog
- 基于FPGA与PC串口自收发通信-Verilog(Self-transceiving Communication Based on FPGA and PC Serial Port-Verilog)