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ADC_Histogram
- 10bit ADC Histogram - 理想ADC Test Pattern - 量測結果--> INL/DNL - 全自動產生 -10bit ADC Histogram- an ideal ADC Test Pattern- measurements-> INL/DNL- Automatic generate
part1_2.tar
- this a 10bit 80MSample/sec SAR ADC with offset cancellation capability (implemented in verilog)-this is a 10bit 80MSample/sec SAR ADC with offset cancellation capability (implemented in verilog)
RealTek-RTD-2482D-for-46inch-10bit-panel
- RealTek RTD2482D for 46inch 10bit panel
E2_4_FpgaSim
- 实现两函数混频，显示图像，量化为10bit(Realize two function mixing, display image)
8b10b Verilog
- 8bit/10bit编码Verilog实现(8bit/10bit Verilog Code)