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DffTech
- VRILOG硬件语言 D主控触发器DFF_MC10131源代码 -D master VRILOG hardware trigger DFF_MC10131 language source code
Dchufajkchufa
- 基于EDA的D触发器，JK触发器，T撇触发器，txt,word格式码源-EDA based on the D flip-flop, JK flip-flop, T flip-flop charge, txt, word format source code
2into2d.ewb.tar
- 通过D触发器实现2进2的EWB程序,可直接在EWB开发环境下进行仿真简单实用-Achieved through the D flip-flop into the 2 2 EWB procedures, directly in the EWB simulation development environment is simple and practical
Basic-sequential-logic
- 用Verilog语言实现D触发器、累加器的功能-D flip-flop, the function of the accumulator using Verilog language
DFF
- 基于传输门结构的D触发器的建立时间和保持时间测量-the measure of DFF s setup time and hold time
2
- 用VHDL语言设计一个8位双向可控移位寄存器。 移位寄存器由D型触发器构成，采用串入并出形式。 采用VHDL方式设计一个16х4位RAM存储器-VHDL language to design an 8-bit bidirectional shift register controllable. The shift register by a D-type flip-flops, using the string into and out of form. Way design using
jiaotongdeng
- 使用4片D触发器来仿真交通灯的数电电路，不需要编写代码。(4 D triggers are used to simulate the digital circuit of traffic lights without writing code.)
D_ff - 快捷方式
- D触发器 主要是连续赋值。一个比较简单的代码，欢迎指正(D is the main trigger continuous assignment.A relatively simple code, welcome.)
shiyanjiu
- 学习verilog时写的D触发器实验代码(D flip-flop experimental code written when learning Verilog)
shiyan9
- 学习verilog时写的D触发器源代码，供大家参考(D flip-flop experimental code written when learning Verilog)