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Advanced.ASIC.Chip.Synthesis.Using.Synopsys.Design
- 使用synopsys design compiler和 prime time进行Asic开发的英文pdf-Advanced.ASIC.Chip.Synthesis.Using.Synopsys.Design.Compiler.Physical.Compiler.And.Primetime
ins_buf_v2.tcl
- a supplemnet of insert_buffer in primetime, support net/load in differenet hierarchy, choose adjacent cells.
PT_1.pdf
- primetime student guide helps to undersatnd the primetime tool