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singlecycle_mips
- single cycle mips design by verilog.
scmips_cpu
- 自己写的单周期mips CPU和测试工程-Write your own single cycle mips CPU and test engineering
project3
- 计算机组成原理 Logisim完成单周期处理器开发 支持指令集MIPS-Lite2-Principles of Computer Organization Logisim complete development support single-cycle instruction set processor MIPS-Lite2
FinalProject_16854131_code
- VHDL single cycle mips processor-single cycle mips processor
sc_computer_2
- Verilog单周期CPU实现,可以实现简单的mips指令，附Verilog源码-Verilog achieve single-cycle CPU
exam06s1
- MIPS Processor Single cycle
MCP_CAN_lib-master
- is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the. ATmega32 achieves throughputs approaching 1 MIPS per MHz allowing the system designer.