实现SPI接口功能, 语言是verilog

// Serial Peripheral Interface (SPI) // The VSPI core implements an SPI interface compatible with the many // serial EEPROMs, and microcontrollers. The VSPI core is typically used // as an SPI master, but it can be configured as an SPI slave as

SPI串口的内核实现verilog语言和VHDL语言-The serial peripheral interface spi bus

Verilog implementation of an SPI slave interface. Intially targetted for Atlys devkit (Xilinx Spartan-6) controlled by TotalPhase Cheetah USB/SPI adapter