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AN75779
- EZ-USB FX3 与FPGA通讯官方例程，包括了短包发送，ZLP发送，LoopBack例程，包括完整的GPIF设计，代码和开发文档-EZ-USB FX3 and FPGA communications official routines, including a short packet is sent, ZLP send, LoopBack routines, including complete GPIF design, code and development documentatio
OFDM-system-based-on-FPGA-design
- OFDM系统发端和手段的最完美的VHDL代码-the best VHDL codes of OFDM system , including the TR and Rx
bd_psk_decoder20150303
- 对DQPSK调制解调技术的FPGA实现进行了比较全面的研究，利用nQpSK调制技术实现了码速20oKbps的调制器。调制载频3.2MHz、带宽18oKHz、带外抑制大于45dB，调制器设计达到预定要求。解调器硬件完成，软件未全部实现，但完成了CIC滤波器、载波跟踪环、位定时同步、并串转换等几个关键模块的设计。对解调器做了实验测试，验证了相关模块设计的正确性，解调器中重要的载波同步功能己能实现-DQPSK modulation and demodulation techniques for FPG
rest
- 基于FPGA的频率及设计，采用等精度测量法。实现频率测量-Frequency and FPGA-based designs, such as the use of precision measurement. Frequency Measurement
FFT8PFPGAPverilog
- FFT8+FPGA+verilog.输入：butt8_real0—7、butt8_imag0—7为输入的8位数据的实部和虚部；输出：y0_real~y7_real、y0_imag~y7_imag为8点fft的输出 -FFT8 FPGA verilog.butt8_real0—7、butt8_imag0—7y0_real~y7_real、y0_imag~y7_imag
THESIS
- FPGA implementaion of Digital down conversion using Cordic algorithm
ethernet_udp_ep4c_ok_final
- 用ALTERA的FPGA实现UDP通信源代码-FPGA UDP
uart
- 黑金FPGA开发板串口收发程序，其中加入FIFO模块作为输入输出缓冲-Black gold development board FPGA procedures, which joined the FIFO module as input and output buffer
serial_Verilog
- 特权同学的串口通信程序，Verilog语言，FPGA开发学习源码-Serial communication program, privileged students Verilog language, FPGA development learning source
vibration-leakage
- 分析了ADC和FPGA如何解决本振泄漏的现象详细描述了方案-The cause and solution of the vibration leakage
i2c
- fpga verilog IIC 已经调试通过-fpga verilog IIC
spihost
- fpga spi 串口 Verilog-fpga spi Verilog
uartip
- fpga verilog 串口 波特率可调-fpga verilog
receive_spi
- verilog语言SPI通信，可用于CPLD以及FPGA-Verilog language SPI communications, can be used for CPLD and FPGA
fpga_spi
- FPGA的SPI通信协议，实现主从串行通信-SPI based on FPGA
reciever
- 利用vhdl语言编写的FPGA串口接受程序-Vhdl language use FPGA Serial acceptance procedure
groundhog_v_0_2
- Groundhog implements a SATA host bus adapter.-Groundhog implements a SATA host bus adapter. This Verilog-based project creates an easy-to-use interface between a user circuit on a Xilinx FPGA and a SATA hard drive or SSD.
hm
- 汉明码的 编译，实现基于fpga的串口通信-Hamming compilation
vhdl-GPS
- 基于FPGA设计一个GPS模块电路，实现数据接收和处理功能-Based on the FPGA, a GPS module circuit is designed to realize the GPS data receiving and processing functions.
key_filter
- 用于FPGA的按键消抖的Verilog文件，经过modelsim仿真和下板验证。-Verilog file for FPGA key debounce, after modelsim simulation and verification under the plate.