BL5372, RTC时钟驱动,基于ESS DVD环境-BL5372, RTC clock-driven, based on the ESS DVD environment

The Xilinx CORE Generator™ is used to create a single-lane PCIe Endpoint Plus design. The generated PCIe system contains the PCIe endpoint plus block, GTP tiles, block RAMs, and clock and reset modules. The tutorial below shows how to create the