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用一位全加器组成四位全加器
- 用一位全加器组成四位全加器. 所用语言是Verilog HDL. 主要用在加法器的设计中。-All-Canadian with a composed four-adder. The language used is the Verilog HDL. In addition main The design.
基于半加器的全加器描述及仿真
- vhdl基于半加器的全加器描述及仿真-VHDL-based increases for the entire increase Descr iption and Simulation
8bit全加器带进位复位功能
- 8bit全加器带进位复位功能 已经通过防真
four_adder
- 应用一位全加器的VHDL语言，创建一位全加器符号，用原理图完成四位全加器-Application of a full adder VHDL language, to create a full-adder symbol, with the principle of the completion of four full adder diagram
一位半加器
- 这是一个用vhdl语言设计的一位半加器以及一位全加器的代码，经过QUARTUS验证可以运行！
adder1
- 一个全加器的VHDL程序,经过编译和仿真.-A full adder of the VHDL program, after compiling and simulation.
fulladder
- 使用Vhdl语言实现数字电路全加器功能，算法比较简单，供初学者参考。-full adder
w
- 用VHDL语言设计四位全加器，有低位进位和高位进位。-VHDL language with four full-adder design, there are low and the high binary binary.
VHDL03
- 全加器仿真程序代码，本人亲自测试，代码简单，安全无毒。放心下载和使用。-Full adder simulation code, I personally tested the code simple, safe non-toxic. Ease to download and use.
4add
- 一位全加器和四位全加器，EDA板图设计，并且有图片。
adder
- 实验一 1位全加器的设计 详细的试验步骤一节过程分析！-Experiment-1 adder design a detailed process analysis of test steps!
sy4
- 用VHDL语言设计了一个8位2进制全加器-VHDL language design with an 8-bit binary full adder 2
fadder_1
- 利用quartus9.0编写的半加器程序，自己亲手设计，能有效运行出结果(Quartus9.0 prepared by the semi adder program, personally designed to effectively run the results)
hadder_1
- 用quartus9.0编写的一位全加器，自己设计，能有效运行出结果(Written in quartus9.0 with a full adder, their own design, can effectively run the results)
fadder_4
- 利用quartus9.0中元器件模块设计的四位全加器，能运行出结果(Quartus9.0 binary device using the design of four bit full adder, can run the results)
fadder_4v
- 利用quartus9.0中verilog语言实现的四位全加器，亲测有效(Using quartus9.0 Verilog language to achieve the four bit full adder, pro test effective)
full_adder
- 全加器，可以实现数据的加法运算，有来自低位的进位和向高位的进位。(Full adder, data can be added to the operation, there are low from the carry and to the high carry.)
EDAadd
- 全加器Full adder schematic waveform diagram(Full adder schematic waveform diagram)
4位全加器 计数器等程序
- EDA仿真工具使用的，进行EDA开发的多个程序； 包括：4位全加器，12分频，128分频，篮球计数秒表（部分），计数器； 可以搭配EDA仿真软件使用，也可以搭配开发板使用；(EDA simulation tools used for EDA development of multiple programs; Including: 4 bit full adder, 12 frequency division, 128 frequency division, basketball cou
quanjiaqi
- 程序的功能是在quartus II环境下实现全加器的功能。(The function of the program is to implement the full adder function in Quartus II environment.)