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modbus2002-1d
- 自已编写的MODBUS程序，主要用开工业上PLC、现厂仪表、控制系统之间的通讯。-own MODBUS prepared by the procedures, which was spent mainly on the open industrial PLC, the plant instrumentation, control system communications.
DCT_vhdl
- IDCT-M is a medium speed 1D IDCT core -- it can accept a continous stream of 12-bit input words at a rate of -- 1 bit/ck cycle, operating at 50MHz speed, it can process MP@ML MPEG video -- the core is 100％ synthesizable-IDCT-M is a medium speed
IR-DSY
- 红外遥控键值解码1602液晶显示 红外遥控器键值如下： 10 03 01 06 09 1D 1F 0D 19 1B 11 15 17 12 16 4C 40 48 04 00 02 05 54 4D 0A 1E 0E 1A 1C 14 0F 0C
LM3S_uCOS2_Keil_V1.1d
- 基于群星Cortex-M3的μCOS-II移植模板的使用 KEIL环境-Cortex-M3-based stars μCOS-II portable use of templates KEIL environment
1D-DCT
- 一个完整的基于DSP的一维DCT变换和逆变换的程序。-A complete DSP-based one-dimensional DCT transform and inverse transform process.
DSP-c-Matlab-Programs-ManualV19
- 印度GURUNANAK ENGINEERING COLLEGE数字信号处理实验室的DSP+c+Matlab联合编程手册-DIGITAL SIGNAL PROCESSING LAB (IV-I SEM) INDEX 1. Architecture of DSP chips-TMS 320C 6713 DSP Processor 2. Linear convolution 3. Circular convolution 4. FIR Filter (LP/HP) Using Wi
1DCT_VHDL
- VHDL Behavioral Model for 1D DCT operation Algorithm : Calculates the 1D DCT coefficients. DCT Points range from 8 to 32. There is double buffering at the input, to allow continuous usage of DCT engine.-VHDL Behavioral Model for 1D DCT operation
BarcodeScaner
- HYINTECH 手持机 wince 下条码扫描头程序源码-wince the first program source code under the bar code scanner
dct
- all ok...4 Dec 2009 ... In this method the 2-Dimensional DCT is obtained by taking two ... column-wise 1D DCT is ascertained which gives the 2D DCT of the data. ... The design is done in Verilog HDL and the simulation is done in Modelsim 6.3b.
DCQ-1D-11F2-D5
- 高频调谐器资料(旭光) DVB-C数字有线电视调谐器-three-circuit tuner
modbus2002-1d
- modbus rtu 从模式，用51单片机汇编ASM实现莫迪康从模式通讯-modbus rtu slave mode, with 51 single-chip assembly mode communication from the ASM to achieve Modicon
VLSI-Architectures-for-Discrete-Wavelet-Transform
- VLSI architecture and VHDL codes for 1D and 2D DWT and IDWT schemes.
FPU-rungekutta-T-N
- 一维格点模型的热传导中温度随各个格点的分布曲线求法，还可以求热导率-Themoal conduction in 1D lattice model
1D-4
- some pdf code for cognitive radio
shift_arr
- This contains the shift array which can be used in 2D DCT with help of 2 1D DCTs.
uvm-1.1d.tar
- UVM World 官方发布的UVM（通用验证方法学）的源代码，基于SystemVerilog，用于ASIC Verification。2013-03最新发布版本uvm-1.1d.tar.gz-The UVM World official release of the source code of the UVM (Universal Verification Methodology), based on SystemVerilog for ASIC Verification. 2013-03
FILTER
- VERILOG CODE FOR 1D FIR FILTER IMPLIMENTATION -VERILOG CODE FOR 1D FIR FILTER IMPLIMENTATION
IR-DSY
- 红外遥控键值解码1602液晶显示红外遥控器键值如下：10 03 01 0609 1D 1F 0D19 1B 11 1517 12 16 4C40 48 04 0002 05 54 4D0A 1E 0E 1A1C 14 0F 0C-Infrared remote control key decoder 1602 LCD IR remote control keys are as follows: 10 03 01 0609 1D 1F 0D19 1B 11 1517 12 16 4C40 48 0
8-bit-RISC_CPU
- 8位RISC_CPU设计的verilog源码以及工程文件、测试数据文件。在modelsim 10.1d下验证成功，打开工程文件即可使用。-8 RISC_CPU design verilog source code and project files, test data files. In modelsim 10.1d validation is successful, open the project file can be used.
modelsim_10.1d破解工具
- modelsim_10.1d破解工具 modelsim_10.1d破解工具(modelsim_10.1d crack tools)