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DCT_vhdl
- IDCT-M is a medium speed 1D IDCT core -- it can accept a continous stream of 12-bit input words at a rate of -- 1 bit/ck cycle, operating at 50MHz speed, it can process MP@ML MPEG video -- the core is 100% synthesizable-IDCT-M is a medium speed
1DCT_VHDL
- VHDL Behavioral Model for 1D DCT operation Algorithm : Calculates the 1D DCT coefficients. DCT Points range from 8 to 32. There is double buffering at the input, to allow continuous usage of DCT engine.-VHDL Behavioral Model for 1D DCT operation
dct
- all ok...4 Dec 2009 ... In this method the 2-Dimensional DCT is obtained by taking two ... column-wise 1D DCT is ascertained which gives the 2D DCT of the data. ... The design is done in Verilog HDL and the simulation is done in Modelsim 6.3b.
VLSI-Architectures-for-Discrete-Wavelet-Transform
- VLSI architecture and VHDL codes for 1D and 2D DWT and IDWT schemes.
shift_arr
- This contains the shift array which can be used in 2D DCT with help of 2 1D DCTs.
uvm-1.1d.tar
- UVM World 官方发布的UVM(通用验证方法学)的源代码,基于SystemVerilog,用于ASIC Verification。2013-03最新发布版本uvm-1.1d.tar.gz-The UVM World official release of the source code of the UVM (Universal Verification Methodology), based on SystemVerilog for ASIC Verification. 2013-03
FILTER
- VERILOG CODE FOR 1D FIR FILTER IMPLIMENTATION -VERILOG CODE FOR 1D FIR FILTER IMPLIMENTATION
8-bit-RISC_CPU
- 8位RISC_CPU设计的verilog源码以及工程文件、测试数据文件。在modelsim 10.1d下验证成功,打开工程文件即可使用。-8 RISC_CPU design verilog source code and project files, test data files. In modelsim 10.1d validation is successful, open the project file can be used.
uvm-1.1
- 学习IC验证的好资料,包括UVM-1.1a和UVM-1.1d的全部工程example,适合IC验证基于UVM平台的初学者。-Learn good about IC verification, including all engineering of UVM-1.1a and UVM-1.1d, for beginners based on the UVM platform for IC verification.
modelsim_10.1d破解工具
- modelsim_10.1d破解工具 modelsim_10.1d破解工具(modelsim_10.1d crack tools)
crc7
- 以crc7为例进行UVM的验证 Part 1: 搭建环境。 本文使用的Quartus II 13.1(64 bit),器件库MAX V。写了一个Verilog的简单的crc7。 仿真环境是ModelSim 10.2c。虽说自带UVM库。但是,没找到Modelsim自带的uvm_dpi.dll,于是,还重新编译了一番。 本文在win 10下。下载uvm-1.1d(现在最新版本有1.2d了),放好。(crc7 code by system verilog language)