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C51-counter.rar
- 用C51座位CPU的计算器，具备8位数加减乘除功能。P0作为数码管的段控制，P2作为数码管位显示控制，P3控制4x4键盘阵列。,C51 as the CPU, the counter can process 8 bit numbers "+,-,*,/". P0 contro the LED and P2 for which bit,P3 oprate the keyborad
cnt8bc
- 8位加减带异步复位计数器，使用双向输入管脚- Design an 8-bit up and down synchronous counter in VHDL with the following features: The same ports are used for signals to be inputted and outputted. The ports are bi-directionally buffered. The counter is with an asynch
shifter
- 完成一个加速器设计，全加器，具 8位计数器-Complete a accelerator design, full adder, an 8-bit counter
UpDownCounter
- 8-Bit Up Down Counter Verilog Code
8-bitcountercanbepresetthereproteussimulationsourc
- 可预置的8位计数器源程序还有proteus仿真-8-bit counter can be preset there proteus simulation source code
Chapter11-13
- 第十一章到第十三章的代码 本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个
counter
- 8 bit counter-8 bit counter!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
cymometer
- 8位十进制的频率计 有相关的波形仿真，对相应计数器的修改，可以实现任何进制（如8、16、32）的修改-8-bit decimal frequency include the relevant waveform simulation, the corresponding changes to the counter, any band can be achieved (eg, 8,16,32) changes
8bit_upDown_counter
- a simple 8 bit up/down counter, very handy and optimized
counter
- 带异步复位功能的8位二进制加法计数器的行为描述-With asynchronous reset counter 8-bit binary adder descr iption of the behavior
counter_program
- 8位计数器程序，可预置的8位计数器程序的主要部分分析，内有程序详细注释-8-bit counter program, 8-bit counter can be preset for major part of the analysis, detailed comments within the program
6-BIT-count
- 利用AT89S51单片机的T0、T1的定时计数器功能，来完成对输入的信号进行频率计数，计数的频率结果通过8位动态数码管显示出来。要求能够对0－250KHZ的信号频率进行准确计数，计数误差不超过±1HZ。-AT89S51 MCU using T0, T1 of the timer counter functions, to complete the input signal frequency count, counting the frequency of results by 8-bit dy
PSoCDigitModule
- PSoC常用数字模块，介绍了cypress公司的PSoC1系列中的常用数字模块：8位定时器模块Timer8，8位计数器模块Counter8 ，8位脉宽调制模块PWM8 ，LED模块，7段数码管控制器模块LED7SEG，LCD模块。 -PSoC common digital module, introduced the company' s PSoC1 series cypress common digital module: 8-bit timer module Timer8, 8-b
HW3
- Write VHDL codes to model an 8-bit counter that counts every second. It counts from your last two digits of your student ID to your next two digits of your student ID. If the last two digits are greater than the next two digits, the counters counts d
adder3
- 此源代码是基于Verilog语言的七人投票表决器 、2 个 8 位数相乘 、8 位二进制数的乘法 、同一循环的不同实现方式、使用了`include 语句的 16 位加法器 、条件编译、加法计数器中的进程、任务、测试、函数、用函数和 case语句描述的编码器、阶乘运算函数、测试程序 、顺序执行、并行执行，特别是七人投票表决器，这是我目前发现的最优的用硬件描述的源代码。-The Verilog language source code is based on the seven-vote, and
8-Bit-Up-Counter-With-Load
- 8位计数器与负荷 -----------------------8位计数器与负荷 -8-Bit Up Counter With Load 1------------------------------------------------------- 2-- Design Name : up_counter_load 3-- File Name : up_counter_load.vhd 4-- Function : Up counter
8-bit-decimal-frequency-meter
- 利用FPGA，实现8位十进制频率计功能。高效，实用。-Using FPGA, to achieve 8-bit decimal frequency counter function. Efficient and practical.
The-8-down-counter-design
- 带异步复位和计数使能控制的8位二进制减法计数器设计-With asynchronous reset and the count enable control 8 bit binary subtraction counter design
8-Bit-Up-Counter-With-Load
- 8位计数器，能实现加减计数，经过ise 测试仿真了。符合逻辑-8-bit counter, plus or minus count after ise test simulation. Logical
verilog-8-bit-Gray-Counter
- Verilog 8 bit Gray Counter