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AES
- AES在AVR单片机上的实现 资源要求 Program: 4492 bytes (6.9％ Full) (.text + .data + .bootloader) Data: 745 bytes (9.1％ Full) (.data + .bss + .noinit) 可以在AVR Studio中模拟运行 AES加密和解密 在AVR Studio 中模拟运行 Ctrl+F7 后，模拟执行到main入口处 按F5后, 知道到加密完成 可以看
AES
- AES单片机加解密程序 很好的一个程序，大家赶快下载
AES加密的VHDL源码
- 用VHDL语言实现的AES加密算法的源代码，已经在硬件上下载运行实现了。
aes.rar
- AES加解密算法的C语言实现，可用于嵌入式，PC机程序,source code for AES, c language
aescore
- 基于FPGA的AES算法实现的VERILOG源代码，对于信息安全专业研究AES算法的硬件实现很有用-FPGA-based AES algorithm implementation VERILOG source code, for the information security professional research of the hardware implementation of AES algorithm is useful
aes_verilog
- A RTL verilog coding for the project AES, which is a cryptography based concepts
xapp514_aes3-audio
- DVB数字音频接口(AESEBU)encoder源码,包括VHDL和VERILOG,基于XILINX FPGA,已验证.-AES-EBU interface,VHDL,VERILOG
AES256-XILINX10.1
- 用XILINX公司提供的NetFPGA板卡并结合软件Xilinx10.1进行系统设计，采用硬件描述语言Verilog实现了 AES-256加密算法。-Provided by XILINX board combined with software Xilinx10.1 NetFPGA system design, using Verilog hardware descr iption language implementation of the AES-256 encryption algorit
GPS
- evc与mapx mobile 在PDA上开发的GPS接收器。你的电脑上最好有evc++4.0和ppc2003模拟器，还有mapx mobile，没有都可以去官方网站上下载-AES with MapX mobile PDA development of the GIS system, the main function of MapInfo are included in the inside. Your computer is the best and ppc2003 AES Simulato
CoreAES128
- Full AES Simulation Code
AESEncryptionDecryption
- Program for implementing AES on 8051 based microcontrollers. SDCC is used as the C compiler. Microcontroller used is P89V51RD2. There are 2 programs included. One program will accept string via UART and accept key via a 4x4 keypad and display decrypt
aesencryption
- Aes encryption on Fpga
aes_core_latest-1.tar
- Simple AES (Rijndael) balance implementation and trade off size and performance-Simple AES (Rijndael) balance implementation and trade off size and performance
aes_decrypt
- This the Top Module for AES Decryption algorithm-This is the Top Module for AES Decryption algorithm
test_dec1
- This Module creates the test Bench for AES Decryption Algorithm
AES 128 ECB Encryption
- Block mode related AES-EBC Decryption
Package for AES-128
- Block mode related AES Package
aes-master
- aes master by vhdl code and decode
aes-project-master
- aes project vhdl FPGA
16字节加解密的AES算法
- 基于STM32的16字节加解密的AES算法(STM32 based AES algorithm for 16 byte encryption and decryptio)