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TMS320C6455 DDR2驱动例子(经测试可用)
- TMS320C6455 DDR2驱动例子
OpenSPARC_DDR2_controller_RTL_
- 基于FPGA的DDR2控制程序，用verilog编写的。,FPGA-based DDR2 control procedures, prepared by using Verilog.
ddr_ddr2_sdram.rar
- 基于NIOS II的ddr2控制器,配有详细的文档,经验证后可使用.,NIOS II based on the DDR2 controller, equipped with detailed documentation, the experience can be used after certification.
Micron_SDRAM_DDR2Simulation_mo
- DDR2 SDRAM仿真模型，适合于ModelSim下工作，请先阅读readme,DDR2 SDRAM Simulation Model which is suitable for modelsim. Please read readme file firstly.
DDR2 SDRAM 控制器的FPGA实现
- DDR2 SDRAM 控制器的FPGA实现,DDR2 SDRAM controller FPGA to achieve
DSP-533M-ddr2RAM4C6455.rar
- C6455 的 533M DDR2 ram 控制程序。完整代码，可以直接使用。,533M DDR2 ram the C6455 control procedures. Integrity of the code, can be used directly.
DDR2LayoutGuide.rar
- DDR2 Module Master Layout Reference Guide2.pdf,DDR2 Module Master Layout Reference Guide2.pdf
DDR2_16bit
- ddr2原理图设计，原厂电路图设计，很好很强大 16bit-ddr2 schematic design, the original schematic design, a very powerful 16bit
DDR2_Memory_Test
- DDR2 controller which contains verilog files，pdf and so on
Crack_QII81_FULL_License
- quartus 8.1 ipcore lic,包含ddr、ddr2、fir、nco-quartus 8.1 ipcore lic, with ddr, ddr2, fir, nco
Spartan6_DDR2-
- Spartan6 硬核MCB读写DDR2 实战篇-Spartan6 real hard-core DDR2 MCB articles to read and write
ddr_ddr2_sdram9.0
- altera 公司提供的ddr_ddr2_sdram9.0，DDR2 SDRAM 源代码-altera provided ddr_ddr2_sdram9.0, DDR2 SDRAM source code
DDR2_ctrl
- DDR2 SDRAM控制器的设计及FPGA验证
Intel-IOP341-DDR2-memory-controller-initializtion.
- 可以基于本流程了解IOP Raid处理器在启动时对DDR2内存控制器的初始化。也可以以此了解其他片上系统的DDR2控制器的启动方法。-Understanding of this process can be based on IOP Raid processor at boot time on the DDR2 memory controller initialization. Can also be used to understand the other system-on-chip DDR
ddr2
- 基于Xilinx fpga的ddr2 控制器设计方法-Xilinx fpga-based controller design method of ddr2
DDR2
- DDR2仿真说明有图文，容易接受-DDR2 simulation illustrate the illustrations, easy to accept! ! ! !
ddr2
- 德州仪器的C6455范例程序。外部存储器DDR2的使用例子。-TI' s C6455 sample program. Examples of external use of DDR2 memory.
The-Speedy-DDR2-Controller-
- The Speedy DDR2 Controller For FPGAs ERSA 2009 Final
~DDR2-Demonstration
- 基于Xilinx-FPGA的DDR2演示代码-DDR2 Reference design which Based on Xilinx-FPGA
ddr2
- ddr2的功能控制模块，3部分，只要调取就可以。-ddr2 control codes