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  1. firOK

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  2. fir滤波器的设计,此滤波器 Fs为44kHz,Fc为10.4kHz。
  3. 所属分类:VHDL编程

    • 发布日期:2008-10-13
    • 文件大小:964.31kb
    • 提供者:fdf
  1. piby2DQPSK_20_5_rcosine_prbs_3

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  2. this a piby4DQPSK captured signal for those who wants to check their algorithm for modulation classification and symbol rate estimation symbol rate used 1Mbps fs=20 or 40 MSPs and fc=5 MSPS-this is a piby4DQPSK captured signal for those who wants to
  3. 所属分类:SCM

    • 发布日期:2017-04-04
    • 文件大小:304.13kb
    • 提供者:canbruce luwang
  1. QAM128_20_5_rcosine_prbs_131072

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  2. this a qam128 captured signal for those who wants to check their algorithm for modulation classification and symbol rate estimation symbol rate used 1Mbps fs=20 MSPs and fc=5 MSPS-this is a qam128 captured signal for those who wants to check their al
  3. 所属分类:SCM

    • 发布日期:2017-03-29
    • 文件大小:300.21kb
    • 提供者:canbruce luwang
  1. QAM256_20_5_rcosine_prbs_131072

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  2. this a qam256 captured signal for those who wants to check their algorithm for modulation classification and symbol rate estimation symbol rate used 1Mbps fs=20 or 40 MSPs and fc=5 MSPS-this is a qam256 captured signal for those who wants to check th
  3. 所属分类:SCM

    • 发布日期:2017-03-31
    • 文件大小:299.61kb
    • 提供者:canbruce luwang
  1. QAM1024_20_5_rcosine_pattern_131072

    0下载:
  2. this qam1024 captured signal for those who wants to check their algorithm for modulation classification and symbol rate estimation symbol rate used 1Mbps fs=20 or 40 MSPs and fc=5 MSPS-this is qam1024 captured signal for those who wants to check thei
  3. 所属分类:SCM

    • 发布日期:2017-04-07
    • 文件大小:288.99kb
    • 提供者:canbruce luwang
  1. filter

    0下载:
  2. 设计一个16阶的低通FIR滤波器,对模拟信号的采样频率Fs为48KHz,要求信号的截止频率Fc=10.8kHz,输入序列位宽为9位(最高位为符号位)。-The FIR number filter example, designs a 16 ranks of low the FIR filter is a 48 khzs to the sample frequency Fs that imitates signal and request the closing of signal the fre
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-04
    • 文件大小:63.55kb
    • 提供者:mr.liu
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