搜索资源列表
src
- altera 的 fpga 中 fir实现示例，vhdl源码-fpga implementation of fir sample
HDLSample
- FPGA的周边电路的设计源码用HDL语言编写-Peripheral circuit design FPGA using HDL language source
dianticontrol
- 此源码为基于VERILOG的FPGA的电梯控制程序。-This source of FPGA-based VERILOG elevator control procedures.
I2C
- 此源码为基于FPGA的实现I2C总线协议的程序，程序中实现了AT24C02的芯片的读写。-The source code for the FPGA-based implementation of I2C bus protocol of the program, the program is implemented to read and write AT24C02 chip.
8.6DAC0832
- FPGA中用VHDL编写的DA8032的接口电路及程序源码-DA8032 prepared using VHDL FPGA interface circuit and program source code
RTC
- actel fpga开发板fusion startkit实验例程，包含完整工程文件几verilog HDL 源码-actel fpga development board fusion startkit test routines, including the complete works of several verilog HDL source file
ethernet_controller_Verilog
- 以太网控制器源码，verilog语言,包含MAC、MII接口-Ethernet controller ,include MAC and MII interfaces ,by verilog
GPS
- 基于SOPC的GPS设计，全部源码，对于开发GPS有较大帮助~-The GPS-based SOPC design, all the source code, greater help for the development of GPS
SRAM
- FPGA控制SRAM的VERILOG源码-The VERILOG source code control SRAM FPGA
SDRAM
- FPGA SDRAM控制器Verilog源码，通过测试-FPGA SDRAM VERILOG
CameraLink-source-code
- 基于FPGA的多路CameraLink数据的发送和接收程序源码-FPGA-based multi-CameraLink data sent and received program source code
audio-signal-analyzer
- 一等奖作品：音频信号分析仪的FPGA源码，真的不错-First prize works: audio signal analyzer FPGA source code, really good
fpga-filter
- fpga filter,非常好的源码文件，大家一起学习，交流-fpga filter, a very good source files, we will study together and exchange
DE2_LCM_CCD
- de2,altera fpga开发板，自带的源码，cmos的使用-de2, altera fpga development board, comes with source code, cmos use
FPGA
- FPGA应用开发 触发器与计数器的设计 这是实验程序 其中包括源码与实验步骤-FPGA application development triggers and counters, which is the experimental design process, including source code and experimental procedures
EZ-USB-Examples
- USB2.0 ＋ FPGA开发EZ USB开发=源码-USB2.0+ FPGA development EZ USB Development = source
usb2.0 fpga
- 免费的USB2.0源码(支持Xilinx和Alteral的FPGA),用vhdl语言实现。-Free USB2.0 source (supports Xilinx and Alteral the FPGA), using vhdl language.
DE2-VGA-LED
- verilog HDL 语言编写的，FPGA的数码管和VGA的显示。调用时不必修改源码，只需引脚映射对就可以-verilog HDL language, FPGA digital and VGA display. Call without having to modify source code, you can just pin on the map
FPGA_FIDOandSPI
- 在FPGA中建立一个FIFO可用宇内部传输测试使用，也可以用于两个单片机之间的数据传输，同时还上传了基于DSP的SPI设置的FPGA源码-Create a FIFO in the FPGA internal transmission test using the available buildings, can also be used for data transfer between two microcontrollers, but also upload a set of DSP-bas
cfi_ctrl_latest.tar
- 很好的 wishbone转CFI FLASH接口的源码，在INTERL的FLASH上已经调试通过-CFI FLASH CORE