搜索资源列表
fpga-jpeg-verilog
- fpga-jpeg-verilog在fpga平台使用verilog语言进行jpeg算法实现
fpga_jpeg
- 图像jpeg压缩算法,用verilog HDL在FPGA上的实现 -Jpeg image compression algorithm, using verilog HDL Implementation in FPGA
fpga-jpeg-verilog
- fpga实现jpeg压缩，和视频采集程序-fpga jpeg
ejpgl-dev-0.251.tar
- 经过优化的嵌入式系统开源JPEG编解码库；-An open source JPEG codec library optimized for embedded system, including both encoder and decoder. Compact, optimized for specific hardware, easy to be ported to various embedded OS, ESL tools like Handel-C, multi-processor sy
Chapter6-9
- 第六章到第九章的代码 本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例
VERILOG-jpeg
- 用Verilog语言在FPGA上实现JPEG图片的解码，附带testbench-With the Verilog language in the FPGA to achieve JPEG image decoding, with testbench
jpeg.tar
- This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, able to compress at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with resolution 352x288). Image resolution is no
Mars_EP1C6F_Fundermental_demo(Verilog)
- FPGA开发板配套Verilog HDL代码。芯片为Mars EP1C6F。是基础实验的源码。包括加法器、减法器、乘法器、多路选择器等。-FPGA development board supporting Verilog HDL code. Chips for the Mars EP1C6F. Are the basic source experiment. Including the adder, subtraction, and multiplier, such as MUX.
jpegVerilog
- FPGA实现jpeg Verilog源代码-FPGA realization of jpeg Verilog source code
fpga-jpeg
- 基于FPGA的JPEG图像压缩，实现JPEG图像的实时压缩-FPGA JPEG compress
FPGA_image
- fpga实现图像处理，JPEG标准下图象压缩，VHDL语言编程。-fpga implementation image processing, JPEG image compression under the standard, VHDL language programming.
Pelmanism.tar
- FPGA reading JPEG pictures from SD card
mjpeg-decoder_latest.tar
- 基于fpga实现的硬件jpeg格式图片的解码器-jpeg decoder based on FPGA
dct
- JPEG Compression and Ethernet Communication on an FPGA
FPGA_JPEG_discode
- FPGA设计的JPG解码器的设计经典，是JPG解码器设计的指导与方法技术的全面的资料-JPG decoder FPGA design design classics, is the JPG decoder design guidance and comprehensive information on methods and techniques
10.1.1.124.489
- fpga coprocessing in jpeg
dm642-jpegdemo
- 用于TI dm642平台的jpeg压缩程序-Platform for TI dm642 jpeg compression program
JPEG-decoding
- 基于FPGA的JPEG解码算法的研究与实现,对开发JPEG编解码算法有参考价值-FPGA-based JPEG decoding algorithm and implementation of JPEG decoding algorithm on the development of a reference value
Embedded-JPEG-Codec-Library
- An open source JPEG codec library optimized for embedded system, including both encoder and decoder. Compact, optimized for specific hardware, easy to be ported to various embedded OS, ESL tools like Handel-C, multi-processor systems and FPGA.
FPGA实现Jpeg压缩，和视频采集程序
- FPGA实现Jpeg压缩，和视频采集程序(Zynq - Main - register access Mio)