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目前以太网PHY芯片是通过总线MDC/MDIO
- 目前以太网PHY芯片是通过总线MDC/MDIO，但是基本上是通过MAC芯片直接管理的，本代码实现了通过FPGA管理PHY。即由FPGA完成MII管理,At present, Ethernet PHY chip through the bus MDC/MDIO, but basically through the direct management of MAC chip, the code through the FPGA implementation management PHY. FPGA
usb_phy.tar
- Very simple USB 1.1 PHY. Includes all the goodies: serial/parallel conversion, bit stuffing/unstuffing, NRZI encoding decoding. Uses a simplified UTMI interface. Currently doesn t do any error checking in the RX section [should probably check f
fpga
- fpga+sdram+PHY 芯片设计原理图-fpga+ sdram+ PHY chip design schematic
mdio
- cpu与phy通信，让cpu能读写phy芯片，实现通信-cpu communication with phy
DM9000EP_Product_v1.0
- DM9000技術文件 ISA to Ethernet MAC Controller with Intergrated 10/100 PHY-DM9000 technical documents ISA to Ethernet MAC Controller with Intergrated 10/100 PHY
pcie_vera_tb_latest.tar
- FEATURES • 16 bit PIPE Spec PCI Express Testbench • Link training • Initial Flow Control • Packet Classes for easy to build PHY,DLLP and TLP packets • DLLP 16 bit CRC and TLP LCRC generation • Sequence Number
LwipuCOSfor44B0
- LWIP UCOS的所有移植。 包括底层驱动的编写使用的 硬件平台是 AT91SAM7X256 + RTL8201BL(PHY)，至于软件平台，读者从本文标题即可看出。我们使用 uC/OS-II 作为底层操作系统-LWIP UCOS of all transplants. Including the preparation of low-level driver uses the hardware platform is AT91SAM7X256+ RTL8201BL (PHY),
LWIP_TestOK
- 可直接用于Atmel AT91SAM7X256_EK板的简单Web服务器程序， AT91SAM7X256（MAC)+DM9161AE（PHY），Web程序中设定的IP地址192.168.131.200,MAC地址 00-30-6C－00-00-02详见emac_lib.h与ethernetif.c,可在IE浏览器中输入查看，注：MDIX跳线未短接时，PC与EK板均需要通过UTP网线接至交换机，MDIX短接时可用网线直连PC。-Can be used directly Atmel AT91SAM7
usb_latest.tar
- 用VHDL语言编写的USB 2.0IP核。USB 2.0的传输速率是高速率480 Mb/s，需要再外扩一个PHY。-This is a USB 2.0 compliant core，USB 2.0 allows data transfers of 480 Mb/s. Because of the high interface speed, an external PHY will be required with this core.
UIP
- LPC2478移植UIP协议栈移植代码，PHY芯片为KSZ8041NL-LPC2478 UIP transplantation protocol stack porting the code, PHY chip KSZ8041NL
HandsOnZigBee
- Zigbee的參考書，裡面有開發程式，重PHY曾介紹到API層，-Zigbee reference books, which have development programs, re-PHY has been introduced to the API layer,
DX-PHY
- ddr phy design spec and example-ddr phy design spec and example!!
evm9200-sch
- Development set EVM9200, based on AT91RM9200 from Atmel Corporation contain popular interfaces Ethernet 100/10, RS232, USB device, USB host, MultimediaCard, and can be useful for embedded systems developers. Development set EVM9200m, EVM9200m analog,
ofdmbaseband
- the OFDM PHY is adaptive therefore it supports multiple schemes BPSK, QPSK, 16-QAM and 64-QAM for data carriers’ modulation. The constellation diagrams are gray mapped and shows the magnitudes I and Q (In-phase and Quadrature) components of e
MIPI-D-PHY
- MIPI_Alliance_Specification_for_D-PHY -MIPI_Alliance_Specification_for_D-PHY 物理层
MII
- 以太网MII芯片配置接口的VHDL设计，配置PHY芯片的模块设计-Ethernet MII chip configuration interface VHDL design, configuration PHY chip module design
Senior-LTE-PHY-layer-design-engineer
- Senior LTE PHY layer design engineer
STM32F4DISCOVERY_Ethernet-Phy
- stm32f407 phy ethernet application
phy
- 单片机PHY芯片驱动,适用与所有IO口驱动PHY的芯片-Single-chip PHY chip driver, applies to all IO ports driver PHY chip
以太网进阶培训_Part3_更换以太网PHY
- 以太网进阶培训_Part3_更换以太网PHY(Ethernet advanced training _Part3_ replace Ethernet PHY)