使用Libero提供的异步通信IP核实现UART通信，并附带仿真程序。UART设置为1位开始位，8位数据位，1位停止位，无校验。且UART发送自带2级FIFO缓冲，占用FPGA面积很小。,Libero provided the use of asynchronous communication IP core implementation UART communications, and incidental simulation program. UART is set to 1 to sta

fpga里实现 uart 经典 vhdl语言写的 ise工程文件-fpga implementation in vhdl language classic uart of ise project file

是使用ISE实现UART通信功能，可以提高你的FPGA能力。-Is to use the ISE implementation UART communication can improve the ability of your FPGA.

FPGA实现uart的通信，用verilog语言编写，UART是常用的通信方式，值得学习-The FPGA implementation of uart communication, written in verilog language, uart is a common way of communication, worth learning