搜索资源列表
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USB接口控制器参考设计，xilinx提供的VHDL源代码-USB interface controller reference design for Xilinx VHDL source code
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实现USB接口功能的VHDL和verilog完整源代码,Implementation USB interface functions of the VHDL and Verilog source code integrity
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Very simple USB 1.1 PHY. Includes all the goodies: serial/parallel
conversion, bit stuffing/unstuffing, NRZI encoding decoding. Uses a
simplified UTMI interface. Currently doesn t do any error checking in
the RX section [should probably check f
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一个USB 控制接口的参考设计，可作为USB设备的接口控制文件- a reference implement of the control interface of USB device
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DE2开发板上的资料,主要是他的例子,含有各种接口程序,如VGA,USB,LCD等-DE2 development board information, mainly his example, contain a variety of interface program, such as VGA, USB, LCD, etc.
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《FPGA数字电子系统设计与开发实例导航》的配套光盘，Verilog编写，USB、I2C、MAC的接口设计-"FPGA digital electronic system design and development examples navigation" matching discs, Verilog prepared, USB, I2C, the MAC interface design -err
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USB通信协议的硬件描述语言代码，用于FPGA的总线接口控制器开发-USB communication protocol of the hardware descr iption language code for the FPGA bus interface controller development
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键盘和USB与PC机的接口程序，适用于CPLD FPGA设计中，与上位机的连接与通信-Keyboard and USB and PC-interface program for the design of CPLD FPGA with PC connectivity and communication
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USB接口控制器参考设计，xilinx提供VHDL代码 -USB interface controller reference design, xilinx provide VHDL code
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用CPLD驱动UART转USB芯片CP2102的verilog代码，与PC通信
包括CP2102的配置 驱动等-Using CPLD to drive the USB-UART CP2102 interface. verilog code, then communicate with PC, including the configuration and drivers, etc.
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用VHDL编写实现的USB接口控制器源码，自带testbench，解压后用ISE打开工程文件即可。-Prepared with the VHDL source code to achieve the USB interface controller, bring their own testbench, after decompression project file can be opened with the ISE.
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在nios系统开发中的驱动usb接口芯片的代码,包括verilog代码,与相应的驱动代码-In the nios system development driver usb interface chip of the code, including the verilog code, and the corresponding driver code
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usb接口model原码设计,可以模拟USB的接口数据接收,用于usb接口数据的仿真.-usb interface model of the original codes designed to simulate USB interface data reception, usb interface data for the simulation.
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用VHDL语言编写的USB 2.0IP核。USB 2.0的传输速率是高速率480 Mb/s，需要再外扩一个PHY。-This is a USB 2.0 compliant core，USB 2.0 allows data transfers of 480 Mb/s. Because of the high interface speed, an external PHY will be required with this core.
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USB2.0的FPGA内核，使其可以通过FPGA控制CY公司出品的CY7C68013USB微控制器，对USB设备进行读写操作。-• Xilinx Spartan-3 XC3S400 FPGA
• High-Speed (480 MBit/s) USB interface via Mini-USB connector (B-type)
• Cypress CY7C68013A/14A EZ-USB-Microcontroller
• 60 G
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fpga ubs通讯模块 verlog语言
使用EZ-USB FX2-USB interface.
use EZ-USB FX2 carry out PC communication with FPGA by USB.
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本系统设计利用FPGA设计了一个接在电脑串口上的一个DMX512协议的转接卡，它可以让你的电脑变成一台超强的电脑灯控制台或者调光台、LED控制器等。通过电脑软件，可以控制电脑灯或者其他DMX512协议的设备，比如LED灯、激光灯、PAR灯、DJ设备等等。
本系统还有体积小巧携带方便等特点，足够一般的娱乐场所、多功能厅、会议厅等场所使用，同时采用电脑进行灯光的控制，也可以提升工程的技术含量，显得更高科技。通过简单更改DMX模块的UART部分，还可以将串口转换usb接口，不过由于手头上的FPGA
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大量VHDL程序，由浅入深包括基础程序，各种接口实验，PC、USB SRAM等扩展板实验，及综合实验设计等。-A large number of VHDL program, Deep and includes basic procedures, various interface experiment, PC, USB' SRAM other expansion board experiments, and the comprehensive experimental design.
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Full USB interface fo FPGA CPLD VHDL
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Interface TCD1209DG with Altera FPGA and transfer image data to PC via USB using USB FX2 Slave FIFO mode, Only FPGA code included.
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