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scrambler
- 通信系统中的加扰与解扰程序，用verilog语言实现，有波形文件可以直接查看功能
pn_code
- 系数为4的扰码生成器，并每四位扰码产生一个触发串并转换的触发信号，可用于4b/5b编码的触发信号。verilog程序，带test程序-coefficient of the four scrambler generator, and every four scrambler have triggered a string conversion and the trigger signal can be used to trigger 4b/5b coding signal. Verilog pro
scrambler_17
- this parallel scrambler verilog code -this is parallel scrambler verilog code
SCRAMBLER
- 32位扰码器的verilog代码，编译通过-The Verilog code of 32_bit scrambler
DATA_scramble
- 扰码器的verilog实现,参考802.11a相关标准-Scrambler in verilog implementation
yuanchengxu
- 基于Verilog HDL的通信系统设计-Design of communication system based on Verilog HDL
scrambler
- Verilog编写的ADC加扰程序（scrambler）里边附有加扰器的说明，实验可以把数据打散，可自行写testbench测试-Verilog prepared by the ADC scrambled program (scrambler) inside with scrambler descr iption, experimental data can be broken up, write their own testbench test