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liushuideng
- 基于verilog语言，cpld实现的流水灯的程序代码-Based on verilog language, cpld achieve light water code
shumaguan
- verilog 写的，基于CPLD 的数码管实验，输入端是430单片机，cpld做了38译码器和8位所存-verilog written CPLD-based digital tube experiments, the input is 430 single, cpld made 38 decoder and 8 kept
KEY
- fpga cpld 程序 key 按键 按键检测 verilog hdl
VMD642_CPLD
- 本例程位于 VMD642_CPLD目录中。 使用 CPLD 实现辅助译码、LED 指示灯控制、看门狗等各种逻辑控制电路。源程序使 用 Verilog HDL书写，编译开发系统使用 Cypress公司的 Warp 6.3。-This routine is located VMD642_CPLD directory. Using CPLD implementation auxiliary decoding, LED indicator control, watchdog, and othe
lcdname2(santez)
- this program is used to dislay a text on lcd .the language is verilog and it can be usedto program FPGA OR CPLD
digitalclock
- digital alarm clock on lcd- written in verilog to program fpga or cpld
test_led
- Verilog语言的24小时计数器，数码管显示，按键调时，在CPLD上调试正常。-Verilog language 24-hour counter, digital display, when the key tone on CPLD normal debugging.
sdram_epm570_uart
- 基于CPLD芯片EPM570的verilog hdl串口程序-the UART verilog hdl code based on CPLD chip-- EPM570
rs232
- 一个简单的verilog程序，实现PC发送数据给cpld，长篇累牍将数据回送给pc-A simple verilog program, the realization of PC to send data to the CPLD, dozen send data back to the PC
iBoard_TFT_Driver_SRC_V1.00
- iboard 4.3寸 480*272 tft CPLD驱动代码 基于verilog 可直接使用STM32 FSMC控制-iboard 4.3 inch 480* 272 tft CPLD driver code based on verilog. it can directly use STM32 FSMC bus control this driver
quartus9_tst
- 一个比较简单的基于CPLD的数码管显示程序，适合初学者学习，使用Verilog编写-A relatively simple CPLD-based digital tube display program, suitable for beginners to learn to write using Verilog
counter_johnson
- 基于FPGA,CPLD嵌入式系统的Verilog语言，用于实现Johnson计数器。-base on the FPGA or DPLD，to complement the Johnson counter.
spi1
- 使用verilog语言编写的实现cpld EPM570与EEPROM的SPI通信-Using verilog language to achieve cpld EPM570 SPI communication with the EEPROM
manchester-Xinlinx
- verilog代码： 基于cpld的machester编译码器-verilog code: cpld of machester based codec
ps2scan
- 采用VERILOG的CPLD编程，通过ps2接收键盘数据，然后把接收到的字母A到Z键值转换相应的ASII码，通过串口发送到PC机上。 -Using VERILOG CPLD programming, through the PS2 receive keyboard data, and then receive the letters A to Z key transformation corresponding ASII code, through the serial port to se
shift-register
- FPGA/CPLD 的verilog移位寄存器代码。-verilog shift register code.
ILX554B_CPLD
- 用CPLD（EMP240T100C5）产生ILX554B的驱动时序，CCD的驱动时序电路程序。用verilog编写。-Drive timing generator ILX554B with CPLD (EMP240T100C5), CCD drive timing circuit program. Written in verilog.
LCD1602
- Verilog 语言 CPLD 控制液晶自定义输出程序，可仿真，可转换电路原理图。-Verilog language CPLD control LCD custom output procedures, can be simulated, can be converted to circuit schematics.
Verilog_prj
- 特权同学BJ-EPM240 CPLD开发板配套视频源码文件，ex1~ex15全，是入门Verilog的首选。-Privileged students BJ-EPM240 CPLD development board supporting the video source files, ex1 ~ ex15 whole, is the first choice of entry Verilog.
RS485
- FPGA/CPLD实现RS485通信协议，在Quartus ii平台上进行Verilog编程仿真-FPGA/CPLD realize RS485 communication protocol used to Verilog simulation on Quartus ii programming platform