搜索资源列表
DE2_NIOS_HOST_MOUSE_VGA
- 用Vrilog实现了在显示器上用鼠标画图,开发环境是DE2-70-DE2-70 development environment to achieve a draw with the mouse on the display with the Vrilog
DE2_70_Control_Panel_v1.3.0
- DE2-70开发板中附带的控制面板,可以读取存储器中的数据,这个可以正常连接和读取,有好几版本的,有的不能用,而这个经过我亲自测试。-DE2-70 development board comes with a control panel, you can read the data in the memory, this can be properly connected and read, there are several versions, and some can not be used
DE2_70_pin_assignments
- DE2-70开发板中附带的引脚的分配列表,格式为.csv的-DE2-70 development board comes with the pin assignment list, in the format. Csv
DE2_70_NIOS_10_flash
- 首先将此Verilog程序下载到DE2-70开发板上后,然后用NiosII软件将任何文件的二进制数据写入到ssram或者sdram等存储器重去,并可以指定起始地址。-First program this Verilog downloaded to the DE2-70 development board, and then the use NiosII software binary data of any file written to memory such as ssram or sdra
DE2_PS2_Debug
- 这是altera公司的DE2-35开发板下的一个PS2键盘的源程序代码工程,包括PS2驱动等模块有需要的人,可以下载-Altera DE2-35 development board of the company, the source code of a PS2 keyboard works, including the the PS2 driver modules need, you can download
DE2_WhatchDog
- 这是altera公司的DE2-35开发板下的一个看门狗源程序代码工程,包括看门狗的软硬件设计等有需要的人,可以下载 -This is a watchdog source code altera DE2-35 development board of the company under the project, including the the watchdog hardware and software design and other people in need, you can do
DE2_LCM_DISP_sucess
- 这是altera公司的DE2-35开发板下的一个液晶显示屏源程序代码工程,液晶显示屏是友晶公司的,包括液晶显示屏的驱动以及显示等模块有需要的人,可以下载 -Altera DE2-35 development board of the company, a liquid crystal display source code engineering, LCD display the Terasic, including LCD driver module and display needs,
Function_clock_generate
- 基于FPGA实现的实时闹钟,在DE2—115开发板上通过验证,实现报时,定时,时间调整等功能-Based on verified DE2-115 development board FPGA to achieve real-time alarm, timekeeping, timing, time adjustment
pipelined_computer
- 基于de2-board的汇编以及verilog的五段流水线CPU代码,适合新手学习-Based on the de2-board assembler, and the five-stage pipelined CPU verilog code, suitable for novice learning
DE2_NET
- 这是DE2-35开发光盘里的网络开发例程,有需要的可以下载-DE2-35 development in the CD-ROM, network development routines need can be downloaded
DE2_SD_Card_Audio
- 这是DE2-35开发光盘的SD卡的例程资料,有需要的可以下载-DE2-35 development of the CD-ROM of the SD card routine information needs can be downloaded
niosII_cycloneIII_3c120_fast
- nois2 开发实例。应用平台是DE2开发板。实现一个简单的电子时钟的显示万年历。设计简单,便捷-Frequency meter, the use of Fpga language design and implementation of frequency measurement, can modify their own, platform type ED2 development board "
www_onlylz_com@b-do84mw
- nois2 开发实例。应用平台是DE2开发板。实现一个简单的电子时钟的显示万年历。设计简单,便捷-nois2 development instance. The application platform is DE2 development board. Implement a simple electronic clock display calendar. The design is simple, convenient
VGA
- 用Verilog HDL编写的VGA显示程序,可实现图像的显示,在DE2-70上测试通过,有很大的参考价值。-Prepared using Verilog HDL VGA display program, image display DE2-70 test by great reference value.
uart
- 用Verilog HDL编写的串口输入输出程序,可实现数据的传输,在DE2-70上测试通过,有很大的参考价值。-Prepared by the serial input and output using Verilog HDL program can achieve data transmission test by DE2-70, there is a great reference value.
sdram_mdl
- 用Verilog HDL编写的SDRAM控制程序,在DE2-70上测试通过,有很大的参考价值。-SDRAM control program written using Verilog HDL DE2-70 test passes, great reference value.
m60
- 数字钟(for DE2 开发板) 1.‘时’、‘分’、‘秒’的十进制数字显示(小时从00~23)计时器。 2. 手动校时、校分、校秒的功能。 3.定时与闹钟功能,能在设定的时间发出闹铃声。 4.进行整点报时。从59分50秒起,每隔2秒钟发出一次低音“嘟”的信号,连续5次,最后一次发出高音“嘀”的信号,此信号结束即达到整点。 5、一个秒表,最低位1 秒、60秒,手动停止,手动重置。 6、一个倒计时,显示小时、分钟、秒,可设置时间。 -Decimal digital
verilog 源代码
- DE2 开发板 PS2 1602 LCD 串行 传输 显示
DE2_Simple_Socket_Example
- DE2板子上的Simple_Socket_Example,可以供大家参考-DE2 board Simple_Socket_Example, for your reference
DE2_pin
- DE2控制面板 液晶显示验证代码 用verilog 语言描写的-this is a control panel about LCD s display expierents