搜索资源列表
边缘检测与分割处理
- 程序代码说明 P0401：用Prewitt算子检测图像的边缘 P0402：用不同σ值的LoG算子检测图像的边缘 P0403：用Canny算子检测图像的边缘 P0404：图像的阈值分割 P0405：用水线阈值法分割图像 P0406：对矩阵进行四叉树分解 P0407：将图像分为文字和非文字的两个类别 P0408：形态学梯度检测二值图像的边缘 P0409：形态学实例——从PCB图像中删除所有电流线，仅保留芯片对象-code P0401 Note : Prewitt operator to detect
S1D13305lcd320240
- 这是我做的针对S1D13305的驱动源码，我集成了ASCII码字库和一级简码汉字库，可以显示任意常用汉字和英文字符，另外还有基本的画线、圆、多边形以及填充等功能！但是由于画图时是边计算边显示，所以显示效果会有抖动，只需通过缓冲区作为中转站就可以解决问题，这个问题就让给使用者解决了！ 如有问题可以发email给我，xianyun.wang@gmail.com-This is what I do against the S1D13305 driver source code, I integra
hwx
- C8051F020，PCA捕捉红外脉冲跳变沿，获得脉宽，通过串口将其上传到上位机-C8051F020, PCA capture the infrared pulse edges, access width, through the serial port to upload to PC
DDR_SDRAM_controller
- DDR SDRAM控制器的VHDL源代码，含详细设计文档。 The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock Manager (DCM) provides t
AM
- FIRPM公园，麦克莱伦最佳equiripple FIR滤波器的设计。乙= FIRPM（不适用，女，甲）返回一个长度为N +1线性相位（真实，对称系数）FIR滤波器具有最佳逼近到所需的频率响应的F和描述在极小极大意义的。F是成对频带边缘载体，以递增0和1之间秩序。 1对应于奈奎斯特频率或采样频率的一半。至少有一个频段必须有一个非零宽度。 A是一个真正的载体，作为F的指定由此得到的滤波器的频率响应所需的幅度B相同大小- FIRPM Parks-McClellan optimal equirippl
wtut_sc
- DCM includes a clock delay locked loop used to minimize clock skew for Spartan-3, Virtex-II, Virtex-II Pro, and Virtex-II Pro X devices. DCM synchronizes the clock signal at the feedback clock input (CLKFB) to the clock signal at the input clock
PADS2007seriesoftutorialsPADSLogic
- 本教程描述了PADS Logic 的各种功能和特点、以及使用方法。这些功能包括：如何在 PADS Longic 中使用工作区(Working Area),如何在PADS Longic的元件库中定义目标库(Library) 如何添加边线(Connection)、拷贝(Copy)、删除(Delete)和编辑(Edit)等操作方式(Mode)。-PADS Logic This tutorial describes the various functions and features,
SEED401_SobelEdge_all
- DM642的图象边缘轮廓提取例程，要求合众达的DM642图象实验箱配合。但也可以只参考算法部分。-DM642 image edges extraction routines require united up to the DM642 images with the experimental box. But it can also only part of the reference algorithm.
berteroheadmodel
- Analytical expressions for the vector magnetic fields and Fourier transforms associated with thin film heads are presented. These results are derived from accurate, approximate expressions for the surface field of an asymmetric thin film head determi
stoppsignal
- A VHDL module that counts long pulses on the inport counting rising edges.
11
- 频率计设计，采用计数跳变沿的方法计数，准确率狠大的提高-Frequency Meter, using counting methods count edges, greatly improved the accuracy of ruthless
84918361edge-alignedPWM
- PWM波的产生与应用，关于PWm波的边缘对齐与中心对齐-PWM wave generation and application, on PWm wave edges and center-aligned
I2C_vhdl
- IMPORTANT NOTE: This design uses the I2C SCL signal as a clock. This requires that the SCL signal have clean, fast edges on both the rising and falling edges of this signal. Slow rise and fall times on this signal can show noise effects whic
DATA_SAMPLE
- 运用VHDL实现双时钟沿的数据采集（上升沿和下降沿同时采集）-The use of VHDL data acquisition (rising and falling edges of the dual clock edge Acquisition)
88
- 8x8点阵的程序，横向列向都有锁存,压缩包中有proteus仿真，请注意文件延时。-8x8 dot matrix program, two latches for each edges
16x32dotwithout595
- 单片机16*32点阵列程序，没有用74HC595，两端全部有锁存。-program for MCU51 ,about 16*32 dot array,latches with each edges,without74HC959,just 6 74HC373
easyDerivator
- Easy derivator circuit, detects rising and falling edges of single signal.
QDEC
- 旋转编码器的正交解码程序，使用VHDL语言--- This decoder in VHDL samples the signals using all four available edges of -- A and B. E.g. sample(B) on rising(A), sample(A) on falling(B), sample(B) on -- falling(A), and sample(A) on rising(B).
SobelEdge_all
- 基于dsp c64的边缘检测算法的实现 Sobel边缘算子 两个卷积形成sobel算子，图像中每个点都用这两个核做卷积，一个核对同常的垂直边缘相应最大，而另一个对水平边缘相应最大。-Dsp c64 edge detection algorithm to achieve Sobel edge operator the two convolutional formation sobel operator, for each point in the image with the convolutio
Adarsh_aadu999_Edge_Avoider_for_ATmega8
- This the Embedded C code for Atmega 8. This program will avoid edges using sensors-This is the Embedded C code for Atmega 8. This program will avoid edges using sensors